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* Fix a tblgen subtargetemitter bug, for future Swift support.Andrew Trick2013-06-051-4/+23
| | | | | | | | | | This fixes some of the ridiculously complex code for optimizing the machine model tables that are shared among all processors of a given target. A9 and Swift both use the "special" feature that maps old itinerary classes to new machine model defs. They map different overlapping subsets of instructions, which wasn't handled correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183302 91177308-0d34-0410-b5e6-96231b3b80d8
* PR15662: Optimized debug info produces out of order function parametersDavid Blaikie2013-06-052-3/+104
| | | | | | | | | | | | | | | When a function is inlined we lazily construct the variables representing the function's parameters. After that, we add any remaining unused parameters. If the function doesn't use all the parameters, or uses them out of order, then the DWARF would produce them in that order, producing a parameter order that doesn't match the source. This fix causes us to always keep the arg variables at the start of the variable list & in the original order from the source. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183297 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Make sure to schedule AR register uses and defs in the same clauseTom Stellard2013-06-054-4/+72
| | | | | | Reviewed-by: vljn at ovi.com git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183294 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't print default values for NumberOfAuxSymbols and AuxiliaryData.Rafael Espindola2013-06-053-2/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183293 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle (at least don't crash on) relocations with no symbols.Rafael Espindola2013-06-051-6/+11
| | | | | | Should fix the MCJIT tests on PPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183288 91177308-0d34-0410-b5e6-96231b3b80d8
* Move BinaryRef to a new include/llvm/Object/YAML.h file.Rafael Espindola2013-06-056-51/+99
| | | | | | It will be used for ELF dumping too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183287 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "R600: Add a pass that merge Vector Register"Rafael Espindola2013-06-055-400/+0
| | | | | | This reverts commit r183279. CodeGen/R600/texture-input-merge.ll was failing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183286 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle relocations that don't point to symbols.Rafael Espindola2013-06-0519-73/+62
| | | | | | | | In ELF (as in MachO), not all relocations point to symbols. Represent this properly by using a symbol_iterator instead of a SymbolRef. Update llvm-readobj ELF's dumper to handle relocatios without symbols. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183284 91177308-0d34-0410-b5e6-96231b3b80d8
* [docs] Replace non-existent LLVM_YAML_UNIQUE_TYPE() macroSean Silva2013-06-041-1/+1
| | | | | | LLVM_YAML_STRONG_TYPEDEF() is the correct macro to perform this function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183280 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Add a pass that merge Vector RegisterVincent Lejeune2013-06-045-0/+400
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183279 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Const/Neg/Abs can be folded to dot4Vincent Lejeune2013-06-046-47/+213
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183278 91177308-0d34-0410-b5e6-96231b3b80d8
* Cortex-R5 can issue Thumb2 integer division instructions.Evan Cheng2013-06-043-21/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183275 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert series of sched model patches until I figure out what is going on.Arnold Schwaighofer2013-06-049-1278/+208
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183273 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add VFP div instruction on SwiftArnold Schwaighofer2013-06-041-0/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183271 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add SIMD/VFP load/store instructions on SwiftArnold Schwaighofer2013-06-041-0/+364
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183270 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add integer VFP/SIMD instructions on SwiftArnold Schwaighofer2013-06-041-0/+120
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183269 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add integer load/store instructions on SwiftArnold Schwaighofer2013-06-041-0/+209
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183268 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add integer arithmetic instructions on SwiftArnold Schwaighofer2013-06-041-0/+155
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183267 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Cortex A9 - More InstRW sched resourcesArnold Schwaighofer2013-06-041-4/+45
| | | | | | Add more InstRW mappings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183266 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add branch thumb instructionsArnold Schwaighofer2013-06-041-18/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183265 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add branch thumb2 instructionsArnold Schwaighofer2013-06-041-11/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183264 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add branch instructionsArnold Schwaighofer2013-06-041-27/+35
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183263 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add preload thumb2 instructionsArnold Schwaighofer2013-06-041-3/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183262 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add preload instructionsArnold Schwaighofer2013-06-041-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183261 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add more ALU and CMP thumb instructionsArnold Schwaighofer2013-06-041-46/+61
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183260 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add more ALU and CMP thumb2 instructionsArnold Schwaighofer2013-06-041-52/+86
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183259 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add more ALU and CMP instructionsArnold Schwaighofer2013-06-041-37/+49
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183258 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM sched model: Add divsion, loads, branches, vfp cvtArnold Schwaighofer2013-06-044-7/+89
| | | | | | Add some generic SchedWrites and assign resources for Swift and Cortex A9. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183257 91177308-0d34-0410-b5e6-96231b3b80d8
* ARMInstrInfo: Improve isSwiftFastImmShiftArnold Schwaighofer2013-06-041-0/+2
| | | | | | An instruction with less than 3 inputs is trivially a fast immediate shift. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183256 91177308-0d34-0410-b5e6-96231b3b80d8
* SubtargetEmitter fixArnold Schwaighofer2013-06-041-1/+1
| | | | | | Don't output data if we are supposed to ignore the record. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183255 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix link.Richard Smith2013-06-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183248 91177308-0d34-0410-b5e6-96231b3b80d8
* Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,Venkatraman Govindaraju2013-06-0419-154/+157
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183243 91177308-0d34-0410-b5e6-96231b3b80d8
* IndVarSimplify: check if loop invariant expansion can trapDavid Majnemer2013-06-042-1/+33
| | | | | | | | | | | | | | | | IndVarSimplify is willing to move divide instructions outside of their loop bodies if they are invariant of the loop. However, it may not be safe to expand them if we do not know if they can trap. Instead, check to see if it is not safe to expand the instruction and skip the expansion. This fixes PR16041. Testcase by Rafael Ávila de Espíndola. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183239 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Fix crash in ARM backend inside of ARMConstantIslandPassDavid Majnemer2013-06-042-0/+15
| | | | | | | | | | | The ARM backend did not expect LDRBi12 to hold a constant pool operand. Allow for LLVM to deal with the instruction similar to how it deals with LDRi12. This fixes PR16215. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183238 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove "-Wl,-seg1addr -Wl,0xE0000000" from link options.Bob Wilson2013-06-043-6/+3
| | | | | | | | Specifying the load address for Darwin i386 dylibs was a performance optimization for dyld that is not relevant for x86_64 or arm. We can just remove this now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183230 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Swizzle texture/export instructionsVincent Lejeune2013-06-043-25/+131
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183229 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Add a test for r183108Vincent Lejeune2013-06-041-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183228 91177308-0d34-0410-b5e6-96231b3b80d8
* Second part of pr16069Rafael Espindola2013-06-042-5/+24
| | | | | | | | | | | | | | | | | The problem this time seems to be a thinko. We were assuming that in the CFG A | \ | B | / C speculating the basic block B would cause only the phi value for the B->C edge to be speculated. That is not true, the phi's are semantically in the edges, so if the A->B->C path is taken, any code needed for A->C is not executed and we have to consider it too when deciding to speculate B. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183226 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo: s/caes/cases/ in SimplifyCFGHans Wennborg2013-06-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183219 91177308-0d34-0410-b5e6-96231b3b80d8
* Preserve const correctness.Benjamin Kramer2013-06-041-3/+3
| | | | | | GCC complains about casting away const. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183216 91177308-0d34-0410-b5e6-96231b3b80d8
* Test commit for user vmedic, to verify commit access. One line of comment is ↵Vladimir Medic2013-06-041-1/+1
| | | | | | added to MipsAsmParser.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183215 91177308-0d34-0410-b5e6-96231b3b80d8
* [llvm-symbolizer] Avoid calling slow getSymbolSize for Mach-O files. Assume ↵Alexey Samsonov2013-06-043-9/+25
| | | | | | that symbols with zero size are in fact large enough. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183213 91177308-0d34-0410-b5e6-96231b3b80d8
* We are now in 3.4 land. We don't need the 3.3 releaese notes in ToT anymore.Bill Wendling2013-06-042-283/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183210 91177308-0d34-0410-b5e6-96231b3b80d8
* IEEE-754R 5.7.2 General Operations is* operations (except for isCanonical).Michael Gottesman2013-06-042-7/+103
| | | | | | | | | | | | | | | Specifically the following work was done: 1. If the operation was not implemented, I implemented it. 2. If the operation was already implemented, I just moved its location in the APFloat header into the IEEE-754R 5.7.2 section. If the name was incorrect, I put in a comment giving the true IEEE-754R name. Also unittests have been added for all of the functions which did not already have a unittest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183179 91177308-0d34-0410-b5e6-96231b3b80d8
* Silencing an MSVC warning about mixing bool and unsigned int.Aaron Ballman2013-06-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183176 91177308-0d34-0410-b5e6-96231b3b80d8
* Silencing an MSVC warning about */ being found outside of a comment.Aaron Ballman2013-06-041-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183175 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a defect in code-layout pass, improving Benchmarks/Olden/em3d/em3d by ↵Shuxin Yang2013-06-041-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | about 30% (4.58s vs 3.2s on an oldish Mac Tower). The corresponding src is excerpted bellow. The lopp accounts for about 90% of execution time. -------------------- cat -n test-suite/MultiSource/Benchmarks/Olden/em3d/make_graph.c 90 91 for (k=0; k<j; k++) 92 if (other_node == cur_node->to_nodes[k]) break; The defective layout is sketched bellow, where the two branches need to swap. ------------------------------------------------------------------------ L: ... if (cond) goto out-of-loop goto L While this code sequence is defective, I don't understand why it incurs 1/3 of execution time. CPU-event-profiling indicates the poor laoyout dose not increase in br-misprediction; it dosen't increase stall cycle at all, and it dosen't prevent the CPU detect the loop (i.e. Loop-Stream-Detector seems to be working fine as well)... The root cause of the problem is that the layout pass calls AnalyzeBranch() with basic-block which is not updated to reflect its current layout. rdar://13966341 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183174 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete dead safety check.Nick Lewycky2013-06-031-6/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183167 91177308-0d34-0410-b5e6-96231b3b80d8
* SimplifyCFG: Do not transform PHI to select if doing so would be unsafeDavid Majnemer2013-06-032-2/+33
| | | | | | | | | | | | | | PR16069 is an interesting case where an incoming value to a PHI is a trap value while also being a 'ConstantExpr'. We do not consider this case when performing the 'HoistThenElseCodeToIf' optimization. Instead, make our modifications more conservative if we detect that we cannot transform the PHI to a select. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183152 91177308-0d34-0410-b5e6-96231b3b80d8
* SimplifyCFG: Small cleanup, use ICmpInst::isEquality()David Majnemer2013-06-031-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183151 91177308-0d34-0410-b5e6-96231b3b80d8
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