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path: root/include/llvm/CodeGen/ScheduleDAG.h
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* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-5/+5
* Added -stress-sched flag in the Asserts build.Andrew Trick2011-06-151-0/+6
* Remove dead code.Devang Patel2011-06-021-1/+0
* Be careful about scheduling nodes above previous calls. It increase usages ofEvan Cheng2011-04-261-3/+4
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-2/+2
* In the pre-RA scheduler, maintain cmp+br proximity.Andrew Trick2011-04-141-3/+4
* Added a check in the preRA scheduler for potential interference on aAndrew Trick2011-04-071-6/+7
* Typos.Eric Christopher2011-03-071-2/+2
* Introducing a new method of tracking register pressure. We can'tAndrew Trick2011-02-041-4/+7
* Header warning patrol.Eric Christopher2010-12-251-2/+2
* Minor cleanup related to my latest scheduler changes.Andrew Trick2010-12-241-1/+1
* Various bits of framework needed for precise machine-level selectionAndrew Trick2010-12-241-1/+29
* whitespaceAndrew Trick2010-12-241-14/+14
* update comment.Chris Lattner2010-12-201-2/+1
* SDep is POD-like. Shave off a few bytes from SUnit by moving a member around.Benjamin Kramer2010-11-251-7/+10
* Two sets of changes. Sorry they are intermingled.Evan Cheng2010-11-031-3/+7
* Change push_all to a non-virtual function and implement it in theDan Gohman2010-05-261-1/+6
* Delete an unused function.Dan Gohman2010-05-261-1/+0
* Allow targets more controls on what nodes are scheduled by reg pressure, what...Evan Cheng2010-05-201-2/+7
* Add a hybrid bottom up scheduler that reduce register usage while avoidingEvan Cheng2010-05-201-0/+10
* Fix the post-RA instruction scheduler to handle instructions referenced byJim Grosbach2010-05-191-18/+5
* Remove unused member variable.Zhongxing Xu2010-05-171-2/+0
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-011-2/+1
* Delete an unused member variable.Dan Gohman2010-04-131-1/+0
* trim some prototypes.Chris Lattner2010-04-051-1/+0
* Progress towards shepherding debug info through SelectionDAG.Dale Johannesen2010-03-101-12/+27
* Remove some old experimental code that is no longer needed. Remove additional...David Goodwin2009-11-201-16/+12
* Do a scheduling pass ignoring anti-dependencies to identify candidate registe...David Goodwin2009-11-031-16/+22
* Delete bogus semicolons.Dan Gohman2009-10-141-1/+1
* Remove a bunch of unused arguments from functions, silencing aEric Christopher2009-10-141-2/+2
* Delete some obsolete declarations.Dan Gohman2009-10-121-15/+0
* The ScheduleDAG framework now requires an AliasAnalysis argument, thoughDan Gohman2009-10-091-1/+2
* Fix integer overflow in instruction scheduling. This can happen if we haveReid Kleckner2009-09-301-4/+4
* Improve MachineMemOperand handling.Dan Gohman2009-09-251-2/+0
* Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that ...Evan Cheng2009-09-181-1/+2
* eliminate all 80-col violations that I have introduced in my recent checkins ...Gabor Greif2009-08-271-6/+7
* Clean up the minor mess I caused with removing iterator.h. I shall take care ...Gabor Greif2009-08-271-1/+1
* Use the schedule itinerary operand use/def cycle information to adjust depend...David Goodwin2009-08-191-0/+6
* Add callback to allow target to adjust latency of schedule dependency edge.David Goodwin2009-08-131-0/+5
* Add a new bit to SUnit to record whether a node has implicit physregDan Gohman2009-03-231-0/+4
* Fix the Win32 VS2008 build:Sebastian Redl2009-03-191-1/+1
* Unbreak the build on win32.Cedric Venet2009-02-141-1/+1
* When scheduling a block in parts, keep track of the overallDan Gohman2009-02-111-11/+6
* Factor out more code for computing register live-range informationforDan Gohman2009-02-101-0/+15
* Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowingDan Gohman2009-02-071-1/+1
* Tidy up the ScheduleDAG class definition a little. Make a fewDan Gohman2009-02-061-22/+20
* Instead of adding dependence edges between terminator instructionsDan Gohman2009-01-161-1/+5
* CreateVirtualRegisters does trivial copy coalescing. If a node def is used by...Evan Cheng2009-01-161-4/+5
* Move a few containers out of ScheduleDAGInstrs::BuildSchedGraphDan Gohman2009-01-151-4/+3
* Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register...Evan Cheng2009-01-121-1/+1
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