aboutsummaryrefslogtreecommitdiffstats
path: root/include/llvm/Target/TargetSelectionDAG.td
Commit message (Expand)AuthorAgeFilesLines
* Update aosp/master llvm for rebase to r233350Pirama Arumuga Nainar2015-04-091-12/+12
* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-0/+27
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-3/+10
* Update to LLVM 3.5a.Stephen Hines2014-04-241-2/+13
* Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instruc...Hao Liu2013-09-041-0/+2
* Add ISD::FROUND for libm round()Hal Finkel2013-08-071-0/+1
* Create an FPOW SDNode opcode def in the target independent .td file rather th...Owen Anderson2013-05-221-0/+1
* Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.Tim Northover2013-04-201-3/+0
* Remove extra MayLoad/MayStore flags from atomic_load/store.Jakob Stoklund Olesen2012-08-281-2/+2
* Add readcyclecounter lowering on PPC64.Hal Finkel2012-08-041-0/+3
* TableGen: Allow conditional instruction pattern in multiclass.Jim Grosbach2012-07-171-0/+7
* Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman2012-05-141-1/+1
* Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),Dan Gohman2012-05-111-0/+2
* Improve generated code for extending loads and some trunc stores on ARM.James Molloy2012-02-201-0/+45
* Initial CodeGen support for CTTZ/CTLZ where a zero input produces anChandler Carruth2011-12-131-0/+2
* CR fixes per Bruno's request.Nadav Rotem2011-09-111-1/+5
* Basic x86 code generation for atomic load and store instructions.Eli Friedman2011-08-241-0/+32
* Code generation for 'fence' instruction.Eli Friedman2011-07-271-0/+6
* Add an fma TableGen node.Cameron Zwarich2011-07-081-0/+1
* Add one more argument to the prefetch intrinsic to indicate whether it's a dataBruno Cardoso Lopes2011-06-141-2/+2
* FGETSIGN support for x86, using movmskps/pd. Will be enabled with aStuart Hastings2011-06-011-0/+1
* Let the immediate leaf pattern take transforms and switch the signedEric Christopher2011-04-281-2/+2
* Add a new bit that ImmLeaf's can opt into, which allows them to duck out ofChris Lattner2011-04-181-1/+7
* since the VT is fixed for a ImmLeaf, there is no reason to expose it to the m...Chris Lattner2011-04-171-2/+1
* now that predicates have a decent abstraction layer on them, introduce a new Chris Lattner2011-04-171-0/+17
* Rework our internal representation of node predicates to expose moreChris Lattner2011-04-171-1/+13
* [AVX] Add INSERT_SUBVECTOR and support it on x86. This provides aDavid Greene2011-01-261-0/+1
* [AVX] Support EXTRACT_SUBVECTOR on x86. This provides a defaultDavid Greene2011-01-261-4/+10
* [AVX] Fix a typo in the extract subvector type constraints to specifyDavid Greene2011-01-251-2/+2
* [AVX] Add TableGen classes for vector/subvector type constraints.David Greene2011-01-251-0/+14
* Add ARM patterns to match EXTRACT_SUBVECTOR nodes.Bob Wilson2011-01-071-0/+3
* Flag -> Glue, the ongoing sagaChris Lattner2010-12-231-7/+7
* Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.Wesley Peck2010-11-231-15/+15
* Prefetch has a MemOperand now. FileCheckize a test.Dale Johannesen2010-11-191-1/+2
* Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten...Evan Cheng2010-11-031-18/+18
* Grammar.Jim Grosbach2010-10-151-3/+3
* add a common SDPatternOperator base class to SDNode and PatFrag forChris Lattner2010-10-071-2/+7
* fix a long standing wart: all the ComplexPattern's were beingChris Lattner2010-09-211-0/+2
* finally remove the immAllOnesV_bc/immAllZerosV_bc patternsChris Lattner2010-03-281-7/+0
* add some node definitions.Chris Lattner2010-03-281-0/+8
* remove parallel support.Chris Lattner2010-03-271-1/+0
* add a new SDNPVariadic SDNP node flag, and use it inChris Lattner2010-03-191-0/+1
* Make default expansion for FP16 <-> FP32 nodes into libcallsAnton Korobeynikov2010-03-141-0/+2
* remove a dead PatLeaf, I previously changed all uses to use -1 instead.Chris Lattner2010-02-251-1/+0
* Eliminate some uses of immAllOnes, just use -1, it doesChris Lattner2010-02-211-1/+1
* Remove the CPAttrParentAsRoot code, which is unused, and inconvenientDan Gohman2010-01-041-8/+1
* Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.Dan Gohman2009-11-231-7/+0
* Add a couple more target nodesNate Begeman2009-11-031-0/+2
* Initial target-independent CodeGen support for BlockAddresses.Dan Gohman2009-10-301-0/+4
* Add a new "SDTCisVec" SDTypeConstraint. This complements the vAny type.Bob Wilson2009-08-121-2/+5