| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Don't pass StringRef by reference. | Benjamin Kramer | 2010-07-14 | 1 | -1/+1 |
| * | Update comment. | Evan Cheng | 2010-07-13 | 1 | -1/+1 |
| * | Fix a typo and fit in 80 columns. Found by Bob Wilson. | Rafael Espindola | 2010-07-12 | 1 | -1/+1 |
| * | MC: Add MCAsmParserExtension, a base class for all the target/object specific | Daniel Dunbar | 2010-07-12 | 1 | -1/+3 |
| * | Convert the last use of getPhysicalRegisterRegClass and remove it. | Rafael Espindola | 2010-07-12 | 1 | -6/+0 |
| * | Remove TargetInstrInfo::copyRegToReg entirely. | Jakob Stoklund Olesen | 2010-07-11 | 2 | -19/+4 |
| * | Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon. | Rafael Espindola | 2010-07-11 | 1 | -1/+1 |
| * | Remove copyRegToReg from TargetInstrInfo so it is not longer accesible. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -13/+12 |
| * | Fix va_arg for doubles. With this patch VAARG nodes always contain the | Rafael Espindola | 2010-07-11 | 1 | -0/+17 |
| * | Reapply bottom-up fast-isel, with several fixes for x86-32: | Dan Gohman | 2010-07-10 | 1 | -2/+11 |
| * | Automatically fold COPY instructions into stack load/store. | Jakob Stoklund Olesen | 2010-07-09 | 1 | -3/+3 |
| * | Change TII::foldMemoryOperand API to require the machine instruction to be | Jakob Stoklund Olesen | 2010-07-09 | 1 | -7/+5 |
| * | --- Reverse-merging r107947 into '.': | Bob Wilson | 2010-07-09 | 1 | -11/+2 |
| * | Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting | Dan Gohman | 2010-07-09 | 1 | -2/+11 |
| * | Implement X86InstrInfo::copyPhysReg | Jakob Stoklund Olesen | 2010-07-08 | 1 | -0/+5 |
| * | Convert EXTRACT_SUBREG to COPY when emitting machine instrs. | Jakob Stoklund Olesen | 2010-07-08 | 1 | -4/+0 |
| * | Add TargetInstrInfo::copyPhysReg hook and use it from LowerSubregs. | Jakob Stoklund Olesen | 2010-07-08 | 1 | -1/+11 |
| * | Revert 107840 107839 107813 107804 107800 107797 107791. | Dan Gohman | 2010-07-08 | 1 | -11/+2 |
| * | Add X86FastISel support for return statements. This entails refactoring | Dan Gohman | 2010-07-07 | 1 | -2/+11 |
| * | Simplify FastISel's constructor by giving it a FunctionLoweringInfo | Dan Gohman | 2010-07-07 | 1 | -10/+2 |
| * | Split the SDValue out of OutputArg so that SelectionDAG-independent | Dan Gohman | 2010-07-07 | 2 | -24/+7 |
| * | Move ArgFlagsTy, OutputArg, and InputArg out of SelectionDAGNodes.h and | Dan Gohman | 2010-07-07 | 2 | -0/+162 |
| * | CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext. | Dan Gohman | 2010-07-06 | 1 | -1/+1 |
| * | Make getMinimalPhysRegClass' comment mention what makes it different | Dan Gohman | 2010-07-06 | 1 | -1/+2 |
| * | Fix up -fstack-protector on linux to use the segment | Eric Christopher | 2010-07-06 | 1 | -0/+8 |
| * | Add a new target independent COPY instruction and code to lower it. | Jakob Stoklund Olesen | 2010-07-02 | 2 | -2/+12 |
| * | Clean up TargetOpcodes.h a bit, and limit the number of places where the full | Jakob Stoklund Olesen | 2010-07-02 | 2 | -22/+15 |
| * | Revert r107205 and r107207. | Bill Wendling | 2010-06-29 | 1 | -2/+1 |
| * | Introducing the "linker_weak" linkage type. This will be used for Objective-C | Bill Wendling | 2010-06-29 | 1 | -1/+2 |
| * | Add a VT argument to getMinimalPhysRegClass and replace the copy related uses | Rafael Espindola | 2010-06-29 | 1 | -1/+2 |
| * | Change if-conversion block size limit checks to add some flexibility. | Evan Cheng | 2010-06-25 | 2 | -34/+25 |
| * | The hasMemory argument is irrelevant to how the argument | Dale Johannesen | 2010-06-25 | 1 | -7/+2 |
| * | Edit and clarify comments for TargetInstrInfo methods: | Bob Wilson | 2010-06-24 | 1 | -13/+9 |
| * | Reapply r106634, now that the bug it exposed is fixed. | Dan Gohman | 2010-06-24 | 1 | -4/+2 |
| * | Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner... | Daniel Dunbar | 2010-06-23 | 1 | -2/+4 |
| * | Some targets don't require the fencing MEMBARRIER instructions surrounding | Jim Grosbach | 2010-06-23 | 1 | -0/+18 |
| * | remove trailing whitespace | Jim Grosbach | 2010-06-23 | 1 | -85/+85 |
| * | Tail merging pass shall not break up IT blocks. rdar://8115404 | Evan Cheng | 2010-06-22 | 1 | -0/+8 |
| * | Remove isTwoAddress from llvm. | Eric Christopher | 2010-06-21 | 1 | -1/+0 |
| * | Allow ARM if-converter to be run after post allocation scheduling. | Evan Cheng | 2010-06-18 | 1 | -0/+18 |
| * | Start TargetRegisterClass indices at 0 instead of 1, so that | Dan Gohman | 2010-06-18 | 2 | -3/+3 |
| * | Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass, | Dan Gohman | 2010-06-18 | 1 | -4/+2 |
| * | Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This | Stuart Hastings | 2010-06-17 | 1 | -2/+3 |
| * | Fix a comment typo. | Bob Wilson | 2010-06-14 | 1 | -1/+1 |
| * | declare a class with 'class' instead of struct to avoid tag mismatch | Chris Lattner | 2010-06-12 | 1 | -1/+2 |
| * | Allow target to provide its own hazard recognizer to post-ra scheduler. | Evan Cheng | 2010-06-12 | 1 | -0/+11 |
| * | Allow target to place 2-address pass inserted copies in better spots. Thumb2 ... | Evan Cheng | 2010-06-09 | 1 | -0/+8 |
| * | - Fix description of SUBREG_TO_REG. It's not going to generate a zext. But it | Bill Wendling | 2010-06-09 | 1 | -10/+9 |
| * | Reapply r105521, this time appending "LLU" to 64 bit | Bruno Cardoso Lopes | 2010-06-08 | 2 | -2/+4 |
| * | revert r105521, which is breaking the buildbots with stuff like this: | Chris Lattner | 2010-06-05 | 2 | -4/+2 |
