| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add predicates for checking whether targets have free FNEG and FABS operation... | Owen Anderson | 2012-04-02 | 1 | -0/+12 |
| * | Prune some includes and forward declarations. | Craig Topper | 2012-03-25 | 8 | -20/+4 |
| * | Target override to allow CodeGenPrepare to sink address operands to intrinsic... | Pete Cooper | 2012-03-13 | 1 | -0/+12 |
| * | MCRegisterInfo-ize getMatchingSuperReg. | Jim Grosbach | 2012-03-05 | 1 | -4/+1 |
| * | Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce stati... | Craig Topper | 2012-03-05 | 1 | -3/+3 |
| * | Use uint16_t to store register overlaps to reduce static data. | Craig Topper | 2012-03-04 | 1 | -1/+1 |
| * | Use uint16_t instead of unsigned to store registers in reg classes. Reduces s... | Craig Topper | 2012-03-04 | 1 | -5/+5 |
| * | Use uint16_t to store registers in callee saved register tables to reduce siz... | Craig Topper | 2012-03-04 | 1 | -1/+1 |
| * | Move getSubRegIndex out of generated code into MCRegisterInfo, devirtualize it. | Benjamin Kramer | 2012-03-01 | 1 | -5/+0 |
| * | Move TargetRegisterInfo::getSubReg() to MCRegisterInfo. | Jim Grosbach | 2012-03-01 | 1 | -5/+0 |
| * | Make TargetRegisterClasses non-virtual by making the only virtual function a ... | Benjamin Kramer | 2012-03-01 | 1 | -14/+4 |
| * | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng | 2012-02-28 | 1 | -2/+3 |
| * | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar | 2012-02-28 | 1 | -3/+2 |
| * | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng | 2012-02-28 | 1 | -2/+3 |
| * | Make all pointers to TargetRegisterClass const since they are all pointers to... | Craig Topper | 2012-02-22 | 2 | -6/+6 |
| * | Improve generated code for extending loads and some trunc stores on ARM. | James Molloy | 2012-02-20 | 1 | -0/+45 |
| * | Modify the code that emits the module flags to use the new module flags accessor | Bill Wendling | 2012-02-15 | 1 | -3/+6 |
| * | Add code to the target lowering object file module to handle module flags. | Bill Wendling | 2012-02-14 | 1 | -4/+8 |
| * | Rename getExceptionAddressRegister() to getExceptionPointerRegister() for con... | Lang Hames | 2012-02-14 | 1 | -2/+2 |
| * | Remove redundant getAnalysis<> calls in GlobalOpt. Add a few Itanium ABI calls | Nick Lewycky | 2012-02-12 | 1 | -0/+9 |
| * | RegAlloc superpass: includes phi elimination, coalescing, and scheduling. | Andrew Trick | 2012-02-10 | 1 | -4/+0 |
| * | Store just the SimpleValueType in the generated VT tables for each register c... | Benjamin Kramer | 2012-02-09 | 1 | -3/+4 |
| * | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-05 | 4 | -42/+28 |
| * | TargetPassConfig: confine the MC configuration to TargetMachine. | Andrew Trick | 2012-02-04 | 1 | -2/+1 |
| * | Added TargetPassConfig. The first little step toward configuring codegen passes. | Andrew Trick | 2012-02-03 | 1 | -70/+10 |
| * | Require non-NULL register masks. | Jakob Stoklund Olesen | 2012-02-02 | 1 | -1/+4 |
| * | Specify SubRegIndex components on the index itself. | Jakob Stoklund Olesen | 2012-02-01 | 1 | -1/+5 |
| * | VLIW specific scheduler framework that utilizes deterministic finite automato... | Andrew Trick | 2012-02-01 | 2 | -1/+9 |
| * | Properly emit ctors / dtors with priorities into desired sections | Anton Korobeynikov | 2012-01-25 | 1 | -1/+12 |
| * | Add an (interleave A, B, ...) SetTheory operator. | Jakob Stoklund Olesen | 2012-01-24 | 1 | -0/+3 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 2 | -3/+0 |
| * | Add a TargetOption for disabling tail calls. | Nick Lewycky | 2012-01-19 | 1 | -2/+7 |
| * | Add a CoveredBySubRegs property to Register descriptions. | Jakob Stoklund Olesen | 2012-01-18 | 1 | -0/+6 |
| * | Add TableGen support for callee saved registers. | Jakob Stoklund Olesen | 2012-01-17 | 1 | -0/+11 |
| * | Moving options declarations around. | Andrew Trick | 2012-01-17 | 1 | -4/+0 |
| * | Add TRI::getCallPreservedMask() hook. | Jakob Stoklund Olesen | 2012-01-14 | 1 | -1/+22 |
| * | Added the MachineSchedulerPass skeleton. | Andrew Trick | 2012-01-13 | 1 | -0/+4 |
| * | whitespace | Andrew Trick | 2012-01-13 | 1 | -3/+3 |
| * | Allow targets to select source order pre-RA scheduler. | Evan Cheng | 2012-01-12 | 1 | -0/+1 |
| * | Move Sched::Preference out of TargetMachine.h where it is not referenced. | Evan Cheng | 2012-01-12 | 2 | -9/+9 |
| * | Add 'llvm_unreachable' to passify GCC's understanding of the constraints | Chandler Carruth | 2012-01-10 | 1 | -0/+1 |
| * | Remove unnecessary default cases in switches that cover all enum values. | David Blaikie | 2012-01-10 | 1 | -2/+0 |
| * | Split AsmParser into two components - AsmParser and AsmParserVariant | Devang Patel | 2012-01-09 | 1 | -1/+13 |
| * | Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_... | David Blaikie | 2011-12-20 | 3 | -0/+3 |
| * | Add a if-conversion optimization that allows 'true' side of a diamond to be | Evan Cheng | 2011-12-19 | 1 | -0/+16 |
| * | Add "using" to silence warnings. | Eli Friedman | 2011-12-19 | 1 | -0/+2 |
| * | Attempt to fix PR11607 by shuffling around which class defines which methods. | Eli Friedman | 2011-12-19 | 1 | -2/+7 |
| * | Emit a getMatchingSuperRegClass() implementation for every target. | Jakob Stoklund Olesen | 2011-12-19 | 1 | -3/+4 |
| * | Model ARM predicated write as read-mod-write. e.g. | Evan Cheng | 2011-12-14 | 1 | -3/+2 |
| * | Allow target to specify register output dependency. Still default to one. | Evan Cheng | 2011-12-14 | 1 | -0/+10 |
