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* When I rewrote this loop per Chris' preference IDale Johannesen2010-02-101-0/+3
| | | | | | | | changed its behavior. Oops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95811 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite loop to suit Chris' preference.Dale Johannesen2010-02-101-16/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95749 91177308-0d34-0410-b5e6-96231b3b80d8
* Skip DBG_VALUE many places in live intervals andDale Johannesen2010-02-101-21/+31
| | | | | | | | | | | register coalescing. This fixes many crashes and places where debug info affects codegen (when dbg.value is lowered to machine instructions, which it isn't yet in TOT). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95739 91177308-0d34-0410-b5e6-96231b3b80d8
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-17/+11
| | | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
* Run codegen dce pass for all targets at all optimization levels. Previously it'sEvan Cheng2010-02-061-0/+3
| | | | | | | | | | | only run for x86 with fastisel. I've found it being very effective in eliminating some obvious dead code as result of formal parameter lowering especially when tail call optimization eliminated the need for some of the loads from fixed frame objects. It also shrinks a number of the tests. A couple of tests no longer make sense and are now eliminated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
* Ignore DEBUG_VALUE when building live intervals;Dale Johannesen2010-01-221-4/+8
| | | | | | | | | this makes the code work transparently the same whether they're there or not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94240 91177308-0d34-0410-b5e6-96231b3b80d8
* Change errs() to dbgs().David Greene2010-01-041-47/+47
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92529 91177308-0d34-0410-b5e6-96231b3b80d8
* Changed slot index ranges for MachineBasicBlocks to be exclusive of endpoint.Lang Hames2009-12-221-9/+6
| | | | | | | This fixes an in-place update bug where code inserted at the end of basic blocks may not be covered by existing intervals which were live across the entire block. It is also consistent with the way ranges are specified for live intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91859 91177308-0d34-0410-b5e6-96231b3b80d8
* Reuse lowered phi nodes.Jakob Stoklund Olesen2009-12-161-26/+25
| | | | | | | | | | | | | | Tail duplication produces lots of identical phi nodes in different basic blocks. Teach PHIElimination to reuse the join registers when lowering a phi node that is identical to an already lowered node. This saves virtual registers, and more importantly it avoids creating copies the the coalescer doesn't know how to eliminate. Teach LiveIntervalAnalysis about the phi joins with multiple uses. This patch significantly reduces code size produced by -pre-regalloc-taildup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91549 91177308-0d34-0410-b5e6-96231b3b80d8
* Coalesce insert_subreg undef, x first to avoid phase ordering issue.Evan Cheng2009-12-111-1/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91103 91177308-0d34-0410-b5e6-96231b3b80d8
* Also attempt trivial coalescing for live intervals that end in a copy.Jakob Stoklund Olesen2009-12-101-30/+57
| | | | | | | | | | | | | | | The coalescer is supposed to clean these up, but when setting up parameters for a function call, there may be copies to physregs. If the defining instruction has been LICM'ed far away, the coalescer won't touch it. The register allocation hint does not always work - when the register allocator is backtracking, it clears the hints. This patch is more conservative than r90502, and does not break 483.xalancbmk/i686. It still breaks the PowerPC bootstrap, so it is disabled by default, and can be enabled with the -trivial-coalesce-ends option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91049 91177308-0d34-0410-b5e6-96231b3b80d8
* Added a new "splitting" spiller.Lang Hames2009-12-091-2/+2
| | | | | | | | | | | | | | | | When a call is placed to spill an interval this spiller will first try to break the interval up into its component values. Single value intervals and intervals which have already been split (or are the result of previous splits) are spilled by the default spiller. Splitting intervals as described above may improve the performance of generated code in some circumstances. This work is experimental however, and it still miscompiles many benchmarks. It's not recommended for general use yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90951 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r90502. It was causing the llvm-gcc bootstrap on PPC to fail.Bill Wendling2009-12-051-47/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90653 91177308-0d34-0410-b5e6-96231b3b80d8
* Also attempt trivial coalescing for live intervals that end in a copy.Jakob Stoklund Olesen2009-12-041-7/+47
| | | | | | | | | | | | | The coalescer is supposed to clean these up, but when setting up parameters for a function call, there may be copies to physregs. If the defining instruction has been LICM'ed far away, the coalescer won't touch it. The register allocation hint does not always work - when the register allocator is backtracking, it clears the hints. This patch takes care of a few more cases that r90163 missed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90502 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up some loop logic.Jakob Stoklund Olesen2009-12-031-14/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90481 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR5391: support early clobber physical register def tied with a use (ewwww)Evan Cheng2009-12-011-4/+0
| | | | | | | | | - A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber. - If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range. - Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90269 91177308-0d34-0410-b5e6-96231b3b80d8
* New virtual registers created for spill intervals should inherit allocation ↵Jakob Stoklund Olesen2009-11-301-0/+6
| | | | | | | | | | | | | | | | | | | hints from the original register. This helps us avoid silly copies when rematting values that are copied to a physical register: leaq _.str44(%rip), %rcx movq %rcx, %rsi call _strcmp becomes: leaq _.str44(%rip), %rsi call _strcmp The coalescer will not touch the movq because that would tie down the physical register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90163 91177308-0d34-0410-b5e6-96231b3b80d8
* More consistent labelling of basic blocks in debug outputJakob Stoklund Olesen2009-11-201-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89470 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName.Jakob Stoklund Olesen2009-11-201-2/+2
| | | | | | Fix debug code that assumes getBasicBlock never returns NULL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89428 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the -early-coalescing optionJakob Stoklund Olesen2009-11-181-137/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89240 91177308-0d34-0410-b5e6-96231b3b80d8
* Hide a couple of options.Evan Cheng2009-11-091-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86522 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix inverted conflict test in -early-coalesce.Jakob Stoklund Olesen2009-11-071-14/+15
| | | | | | | | | | A non-identity copy cannot be coalesced when the phi join destination register is live at the copy site. Also verify the condition that the PHI join source register is only used in the PHI join. Otherwise the coalescing is invalid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86322 91177308-0d34-0410-b5e6-96231b3b80d8
* The Indexes Patch.Lang Hames2009-11-031-635/+158
| | | | | | | | | | | | | | | | | | This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85979 91177308-0d34-0410-b5e6-96231b3b80d8
* Trim unnecessary includes.Evan Cheng2009-10-201-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84597 91177308-0d34-0410-b5e6-96231b3b80d8
* If the physical register being spilled does not have an interval, spill its ↵Evan Cheng2009-10-201-5/+21
| | | | | | sub-registers instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84586 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman2009-10-091-94/+5
| | | | | | | | | | | | | | | is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
* isTriviallyReMaterializable checks theDan Gohman2009-10-091-2/+1
| | | | | | | | TargetInstrDesc::isRematerializable flag, so it isn't necessary to do this check in its callers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83671 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace some code for aggressive-remat with MachineInstr::isInvariantLoad, andDan Gohman2009-10-071-23/+28
| | | | | | | teach it how to recognize invariant physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83476 91177308-0d34-0410-b5e6-96231b3b80d8
* Oops. Renamed remaining MachineInstrIndex references.Lang Hames2009-10-031-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83255 91177308-0d34-0410-b5e6-96231b3b80d8
* Renamed MachineInstrIndex to LiveIndex.Lang Hames2009-10-031-92/+92
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83254 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused variable.Daniel Dunbar2009-09-251-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82821 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify a few more uses of reg_iterator.Dan Gohman2009-09-251-4/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82812 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve MachineMemOperand handling.Dan Gohman2009-09-251-5/+6
| | | | | | | | | | | | | | | | | | | | | | - Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions. This eliminates MachineInstr's std::list member and allows the data to be created by isel and live for the remainder of codegen, avoiding a lot of copying and unnecessary translation. This also shrinks MemSDNode. - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated fields for MachineMemOperands. - Change MemSDNode to have a MachineMemOperand member instead of its own fields with the same information. This introduces some redundancy, but it's more consistent with what MachineInstr will eventually want. - Ignore alignment when searching for redundant loads for CSE, but remember the greatest alignment. Target-specific code which previously used MemOperandSDNodes with generic SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range so that the SelectionDAG framework knows that MachineMemOperand information is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR5024. LiveVariables physical register defs should *commit* only after allEvan Cheng2009-09-231-0/+4
| | | | | | | | | of the defs are processed. Also fix a implicit_def propagation bug: a implicit_def of a physical register should be applied to uses of the sub-registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82616 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR4986. "r1024 = insert_subreg r1024, undef, 2" cannot be turned in an ↵Evan Cheng2009-09-211-10/+23
| | | | | | implicit_def. Instead, it's an identity copy so it should be eliminated. Also make sure to update livevariable kill information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82436 91177308-0d34-0410-b5e6-96231b3b80d8
* When computing live intervals for earlyclobber operands,Dale Johannesen2009-09-201-3/+16
| | | | | | | | | | | | we pushed the beginning of the interval back 1, so the interval would overlap with inputs that die. We were also pushing the end of the interval back 1, though, which means the earlyclobber didn't overlap with other output operands. Don't do this. PR 4964. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82342 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix -Asserts warning.Daniel Dunbar2009-09-151-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81909 91177308-0d34-0410-b5e6-96231b3b80d8
* Another try at early partial coalescing. Identity phi source copies (their ↵Evan Cheng2009-09-151-58/+56
| | | | | | | | | sources are defined by phi join def) are coalesced. And the phi join copy is backward copy propagated into the other copies. Still miscompiling some tests. :-( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81849 91177308-0d34-0410-b5e6-96231b3b80d8
* Add early coalescing to liveintervals. This is work in progress and is known ↵Evan Cheng2009-09-141-24/+164
| | | | | | | | | to miscompute some tests. Read it at your own rish, I have aged 10 year while writing this. The gist of this is if source of some of the copies that feed into a phi join is defined by the phi join, we'd like to eliminate them. However, if any of the non-identity source overlaps the live interval of the phi join then the coalescer won't be able to coalesce them. The early coalescer's job is to eliminate the identity copies by partially-coalescing the two live intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81796 91177308-0d34-0410-b5e6-96231b3b80d8
* Moved some more index operations over to LiveIntervals.Lang Hames2009-09-121-50/+50
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81605 91177308-0d34-0410-b5e6-96231b3b80d8
* 80 col violations.Evan Cheng2009-09-121-5/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81598 91177308-0d34-0410-b5e6-96231b3b80d8
* Replaces uses of unsigned for indexes in LiveInterval and VNInfo withLang Hames2009-09-041-163/+186
| | | | | | | | | a new class, MachineInstrIndex, which hides arithmetic details from most clients. This is a step towards allowing the register allocator to update/insert code during allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81040 91177308-0d34-0410-b5e6-96231b3b80d8
* Change Pass::print to take a raw ostream instead of std::ostream,Chris Lattner2009-08-231-2/+1
| | | | | | | update all code that this affects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79830 91177308-0d34-0410-b5e6-96231b3b80d8
* remove various std::ostream version of printing methods fromChris Lattner2009-08-231-6/+8
| | | | | | | | | MachineInstr and MachineOperand. This required eliminating a bunch of stuff that was using DOUT, I hope that bill doesn't mind me stealing his fun. ;-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79813 91177308-0d34-0410-b5e6-96231b3b80d8
* remove a dead class.Chris Lattner2009-08-231-5/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79795 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert DOUT to DEBUG(errs()...).Bill Wendling2009-08-221-50/+76
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79752 91177308-0d34-0410-b5e6-96231b3b80d8
* Modified VNInfo. The "copy" member is now a union which holds the copy for a ↵Lang Hames2009-08-101-10/+10
| | | | | | register interval, or the defining register for a stack interval. Access is via getCopy/setCopy and getReg/setReg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78620 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs.Evan Cheng2009-08-051-5/+27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78151 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply LiveInterval index dumping patch, with fixes suggested by BillDavid Greene2009-08-031-0/+6
| | | | | | | and others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78003 91177308-0d34-0410-b5e6-96231b3b80d8
* Use setPreservesAll and setPreservesCFG in CodeGen passes.Dan Gohman2009-07-311-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77754 91177308-0d34-0410-b5e6-96231b3b80d8
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