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* Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce stati...Craig Topper2012-03-0514-52/+52
* Stop fixing bad machine code in LiveIntervalAnalysis.Jakob Stoklund Olesen2012-03-041-15/+3
* Stop adding <imp-def> operands when coalescing sub-registers.Jakob Stoklund Olesen2012-03-041-16/+0
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-0424-57/+57
* Use uint16_t instead of unsigned to store registers in reg classes. Reduces s...Craig Topper2012-03-043-3/+3
* Use uint16_t to store registers in callee saved register tables to reduce siz...Craig Topper2012-03-047-7/+7
* Grammar-o in function name.Eric Christopher2012-03-021-2/+2
* Grammar.Eric Christopher2012-03-021-1/+1
* If the linkage name doesn't exist we're supposed to emit a referenceEric Christopher2012-03-021-4/+3
* Revert "Reorder the sections being output to reduce the number of assembler"Eric Christopher2012-03-021-3/+3
* Reorder the sections being output to reduce the number of assemblerEric Christopher2012-03-011-3/+3
* Minimal changes for LLVM to compile under VS11.Michael J. Spencer2012-03-011-1/+1
* Fix a codegen fault in which log2 or exp2 could be dead-code eliminated even ...James Molloy2012-03-011-2/+4
* Make InlineSpiller bundle-aware.Jakob Stoklund Olesen2012-03-011-45/+48
* Move getBundleStart() into MachineInstrBundle.h.Jakob Stoklund Olesen2012-03-012-11/+1
* Don't redundantly copy implicit operands when rematerializing.Lang Hames2012-03-011-4/+9
* LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" o...Benjamin Kramer2012-02-291-4/+4
* Add an analyzeVirtReg() function.Jakob Stoklund Olesen2012-02-291-0/+33
* Move the operand iterator into MachineInstrBundle.h where it belongs.Jakob Stoklund Olesen2012-02-291-4/+5
* Kill off LiveRangeEdit::getNewVRegs and LiveRangeEdit::getUselessVRegs. TheseLang Hames2012-02-284-31/+10
* Re-commit r151623 with fix. Only issue special no-return calls if it's a dire...Evan Cheng2012-02-285-20/+29
* Fix off-by one in comment.Benjamin Kramer2012-02-281-1/+1
* LegalizeIntegerTypes: Reenable the large shift with small amount optimization.Benjamin Kramer2012-02-281-11/+21
* Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre...Daniel Dunbar2012-02-285-29/+20
* Code cleanup following CR by Duncan.Nadav Rotem2012-02-281-5/+3
* Fix a bug in the code that builds SDNodes from vector GEPs.Nadav Rotem2012-02-281-0/+4
* Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng2012-02-285-20/+29
* Handle regmasks in MachineCSE.Jakob Stoklund Olesen2012-02-281-0/+6
* Handle regmasks in the machine code verifier.Jakob Stoklund Olesen2012-02-281-0/+15
* Fix 80-column violation.Chad Rosier2012-02-281-2/+2
* Fix for PR12090: clear def maps of aliases when visiting a copy. e.g.Evan Cheng2012-02-271-0/+5
* Update machine code verifier.Jakob Stoklund Olesen2012-02-271-35/+91
* Make the peephole optimizer clear kill flags on a vreg if it's about to add newLang Hames2012-02-251-0/+4
* Fixed typo.Lang Hames2012-02-251-1/+1
* Add missing staticJakob Stoklund Olesen2012-02-241-3/+3
* Add a -stress-regalloc=<N> option.Jakob Stoklund Olesen2012-02-241-1/+9
* Don't crash when a glue node contains an internal CopyToRegHal Finkel2012-02-241-0/+3
* SDAGBuilder: Remove register sets that were never read and prune dead code su...Benjamin Kramer2012-02-241-63/+3
* ScheduleDAGInstrs.h:155: warning: suggest parentheses around `&&' within `||'.Nick Lewycky2012-02-241-1/+1
* PostRA sched: speed up physreg tracking by not abusing SparseSet.Andrew Trick2012-02-242-35/+80
* Turn avx insert intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove du...Pete Cooper2012-02-241-0/+15
* If the Address of a variable is an argument then treat the entireEric Christopher2012-02-241-3/+7
* Tabs, formatting and long lines oh my!Eric Christopher2012-02-241-4/+6
* Allow an integer to be converted into an MMX type when it's used in an inlineBill Wendling2012-02-231-2/+8
* BitVectorize loop.Benjamin Kramer2012-02-231-3/+1
* post-ra-sched: Turn the KillIndices vector into a bitvector, it only stored t...Benjamin Kramer2012-02-231-28/+22
* post-ra-sched: Replace a std::set of regs with a bitvector.Benjamin Kramer2012-02-231-5/+4
* Make calls scheduling boundaries post-ra.Jakob Stoklund Olesen2012-02-231-1/+4
* Strip a layer of boilerplate from the VLIWPacketizer by storing the scheduler...Benjamin Kramer2012-02-231-18/+8
* Fix to make sure that a comdat group gets generated correctly for a static me...Anton Korobeynikov2012-02-231-1/+2
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