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* Update aosp/master LLVM for rebase to r235153Pirama Arumuga Nainar2015-05-181-43/+151
| | | | | Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7 (cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
* Update aosp/master llvm for rebase to r233350Pirama Arumuga Nainar2015-04-091-1/+7
| | | | Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-59/+40
| | | | Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-2/+2
| | | | Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
* Update LLVM for rebase to r212749.Stephen Hines2014-07-211-2/+4
| | | | | | | Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-291-2/+43
| | | | Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
* Update to LLVM 3.5a.Stephen Hines2014-04-241-8/+20
| | | | Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
* Merging r195632:Bill Wendling2013-11-261-6/+90
| | | | | | | | | | | | | ------------------------------------------------------------------------ r195632 | tnorthover | 2013-11-25 01:52:59 -0800 (Mon, 25 Nov 2013) | 3 lines X86: enable AVX2 under Haswell native compilation Patch by Adam Strzelecki ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195737 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Add a description for AMD bdver3 aka Steamroller.Benjamin Kramer2013-11-041-3/+5
| | | | | | This is just bdver2 + FSGSBase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193984 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Automatically detect zEC12 and z196 hostsRichard Sandiford2013-10-311-0/+42
| | | | | | | | | | | As on other hosts, the CPU identification instruction is priveleged, so we need to look through /proc/cpuinfo. I copied the PowerPC way of handling "generic". Several tests were implicitly assuming z10 and so failed on z196. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193742 91177308-0d34-0410-b5e6-96231b3b80d8
* Adds support for Atom Silvermont (SLM) - -march=slmPreston Gurd2013-09-131-1/+2
| | | | | | | | | | | | | | Implements Instruction scheduler latencies for Silvermont, using latencies from the Intel Silvermont Optimization Guide. Auto detects SLM. Turns on post RA scheduler when generating code for SLM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190717 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Add a description of the Intel Atom Silvermont CPU.Benjamin Kramer2013-08-301-0/+5
| | | | | | Currently this is just the atom model with SSE4.2 enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189669 91177308-0d34-0410-b5e6-96231b3b80d8
* Actually, use GNU inline asm for cpuid with clangReid Kleckner2013-08-161-10/+10
| | | | | | | Clang doesn't support the MSVC __cpuid intrinsic yet, and fixing that is blocked on some fairly complicated issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188584 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the MSVC __cpuid intrinsic instead of inline asmReid Kleckner2013-08-141-31/+14
| | | | | | This works around PR16830 in LLVM when self-hosting clang on Windows. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188397 91177308-0d34-0410-b5e6-96231b3b80d8
* Some Intel Penryn CPUs come with SSE4 disabled. Detect them as core 2.Benjamin Kramer2013-07-291-1/+3
| | | | | | PR16721. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187350 91177308-0d34-0410-b5e6-96231b3b80d8
* Ensure sys::getProcessTriple always uses a normalized triple. Patch byDuncan Sands2013-07-171-1/+1
| | | | | | | Thomas B. Jablin, from PR16636. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186501 91177308-0d34-0410-b5e6-96231b3b80d8
* Make host ARM CPU feature detection independent of the vendorTobias Grosser2013-06-111-30/+20
| | | | | | | | | | | | For ARM on linux we use /proc/cpuinfo to detect the host CPU's features. Linux derives these values without ever looking at the vendor of the specific CPU implementation. Hence, it adds little value, if we parse the output of /proc/cpuinfo only for certain vendors. This patch enables us to derive the correct feature flags e.g. for Qualcomm CPUs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183790 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow host triple to be correctly overridden in CMake buildsTim Northover2013-05-041-1/+1
| | | | | | | | | | | The intended semantics mirror autoconf, where the user is able to specify a host triple, but if it's left to the build system then "config.guess" is invoked for the default. This also renames the LLVM_HOSTTRIPLE define to LLVM_HOST_TRIPLE to fit in with the style of the surrounding defines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181112 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Add target description for btver2; make autodetection logic aware of AVX.Benjamin Kramer2013-05-031-3/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181005 91177308-0d34-0410-b5e6-96231b3b80d8
* Testing for _XCR_XFEATURE_ENABLED_MASK instead of a specific MSVC version ↵Aaron Ballman2013-04-231-1/+1
| | | | | | because some MSVC 2010 SP1 installations do not have the _xgetbv intrinsic. Patch thanks to Serge Pavlov! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180125 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert windows line endings to linux/unix line endings.Craig Topper2013-04-221-13/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179995 91177308-0d34-0410-b5e6-96231b3b80d8
* Ensuring that both bits are set, and not just a combination of one or the other.Aaron Ballman2013-04-031-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178674 91177308-0d34-0410-b5e6-96231b3b80d8
* Testing for Visual Studio 2010 SP1 or greater before calling the _xgetbv ↵Aaron Ballman2013-04-031-2/+2
| | | | | | intrinsic. This also fixes a minor code formatting issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178666 91177308-0d34-0410-b5e6-96231b3b80d8
* Second pass at addressing PR15351 by explicitly checking for AVX supportAaron Ballman2013-04-031-2/+25
| | | | | | when getting the host processor information. It emits a .byte sequence on GNUC compilers to work around lack of xgetbv support with older assemblers, and resolves a comment typo found in the previous patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178636 91177308-0d34-0410-b5e6-96231b3b80d8
* Rolling back the AVX support patch due to breaking a gcc 4.6 build bot that ↵Aaron Ballman2013-04-031-23/+2
| | | | | | doesn't understand the xgetbv instruction for some reason. Will revisit when time permits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178614 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempting to fix the build on older GCC versions.Aaron Ballman2013-04-031-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178604 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch addresses PR15351 by explicitly checking for AVX supportAaron Ballman2013-04-031-2/+22
| | | | | | when getting the host processor information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178598 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for autodetection of ADM bdver2.Roman Divacky2013-02-261-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176130 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce llvm::sys::getProcessTriple() function.Peter Collingbourne2013-01-161-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | In r143502, we renamed getHostTriple() to getDefaultTargetTriple() as part of work to allow the user to supply a different default target triple at configure time. This change also affected the JIT. However, it is inappropriate to use the default target triple in the JIT in most circumstances because this will not necessarily match the current architecture used by the process, leading to illegal instruction and other such errors at run time. Introduce the getProcessTriple() function for use in the JIT and its clients, and cause the JIT to use it. On architectures with a single bitness, the host and process triples are identical. On other architectures, the host triple represents the architecture of the host CPU, while the process triple represents the architecture used by the host CPU to interpret machine code within the current process. For example, when executing 32-bit code on a 64-bit Linux machine, the host triple may be 'x86_64-unknown-linux-gnu', while the process triple may be 'i386-unknown-linux-gnu'. This fixes JIT for the 32-on-64-bit (and vice versa) build on non-Apple platforms. Differential Revision: http://llvm-reviews.chandlerc.com/D254 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172627 91177308-0d34-0410-b5e6-96231b3b80d8
* Define getHostCPUFeatures for ARM Linux platformHao Liu2012-12-131-0/+58
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170085 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-2/+2
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for Cortex-A15 host recognition.James Molloy2012-10-311-0/+1
| | | | | | | | No testcase, as this is only testable on a C-A15 board. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167108 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for detecting some corei7-class Xeons.Benjamin Kramer2012-09-261-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164714 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for AMD Geode.Roman Divacky2012-09-121-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163710 91177308-0d34-0410-b5e6-96231b3b80d8
* Adds the family codes for the Midview Atom processors so that thePreston Gurd2012-07-191-3/+2
| | | | | | | | Atom buildbot will auto-detect Atom. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160521 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch fixes 8 out of 20 unexpected failures in "make check"Preston Gurd2012-07-181-0/+3
| | | | | | | | | | | | | | | | | when run on an Intel Atom processor. The failures have arisen due to changes elsewhere in the trunk over the past 8 weeks or so. These failures were not detected by the Atom buildbot because the CPU on the Atom buildbot was not being detected as an Atom CPU. The fix for this problem is in Host.cpp and X86Subtarget.cpp, but shall remain commented out until the current set of Atom test failures are fixed. Patch by Andy Zhang and Tyler Nowicki! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160451 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement getHostCPUName for ARM/linux. This will be used to implement ↵Benjamin Kramer2012-06-261-0/+55
| | | | | | | | | | -march=native in clang. The cpuid registers are only available in privileged mode so we don't have an OS-independent way of implementing this. ARM doesn't provide a list of processor IDs so the list is somewhat incomplete. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159228 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes for PPC host detection and features.Hal Finkel2012-06-121-1/+1
| | | | | | | | | POWER4 is a 64-bit CPU (better matched to the 970). The g3 is really the 750 (no altivec), the g4+ is the 74xx (not the 750). Patch by Andreas Tobler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158363 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r158337, this time properly protect Darwin/PPC host CPU use with ↵Hal Finkel2012-06-121-0/+130
| | | | | | | | | | | | | __ppc__. Original commit message: Move PPC host-CPU detection logic from PPCSubtarget into sys::getHostCPUName(). Both the new Linux functionality and the old Darwin functions have been moved. This change also allows this information to be queried directly by clang and other frontends (clang, for example, will now have real -mcpu=native support). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158349 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r158337 "Move PPC host-CPU detection logic from PPCSubtarget into ↵Jakob Stoklund Olesen2012-06-121-130/+0
| | | | | | | | | sys::getHostCPUName()." This commit broke most of the PowerPC unit tests when running on Intel/Apple. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158345 91177308-0d34-0410-b5e6-96231b3b80d8
* Move PPC host-CPU detection logic from PPCSubtarget into sys::getHostCPUName().Hal Finkel2012-06-111-0/+130
| | | | | | | | Both the new Linux functionality and the old Darwin functions have been moved. This change also allows this information to be queried directly by clang and other frontends (clang, for example, will now have real -mcpu=native support). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158337 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the cpuid 64 bit flag to pick the default CPU name for an unknown model.Bob Wilson2012-05-091-1/+1
| | | | | | | | | | | For the Family 6 switch in sys::getHostCPUName, an unrecognized model was reported as "i686". That's a really bad default since it means that new CPUs will be treated as if they can only use 32-bit code. This just looks at the cpuid extended feature flag for 64 bit support, and if that is set, it uses a default x86-64 cpu. Similar logic is already used for the Family 15 code. <rdar://problem/11314502> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156486 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the Intel Atom detection code to recognizePreston Gurd2012-05-021-2/+3
| | | | | | | | Lincroft and Medfield. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156025 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a missing cpu subtype.Evan Cheng2012-04-231-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155402 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unreachable code. (replace with llvm_unreachable to help GCC where ↵David Blaikie2012-01-171-1/+8
| | | | | | necessary) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148284 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definitions for AMD's bobcat (aka btver1)Benjamin Kramer2012-01-101-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147846 91177308-0d34-0410-b5e6-96231b3b80d8
* Autodetect bulldozers.Benjamin Kramer2011-12-011-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145607 91177308-0d34-0410-b5e6-96231b3b80d8
* Intel family 6 model 44 is Gulftown/Westmere-EP and doesn't have AVX.Benjamin Kramer2011-08-251-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138573 91177308-0d34-0410-b5e6-96231b3b80d8
* Update comments for SandyBridge CPU identifiers.Bob Wilson2011-07-081-2/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134759 91177308-0d34-0410-b5e6-96231b3b80d8
* Recognize Intel CPUs with Family=6 and Model=44.Bob Wilson2011-07-081-0/+1
| | | | | | | | According to Intel Application Note 485, this value is used for "Intel Core i7 and Intel Xeon processor". Just include it with the other "corei7-avx" entries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134750 91177308-0d34-0410-b5e6-96231b3b80d8
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