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path: root/lib/Target/ARM/ARMBaseInstrInfo.h
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* Rewrite stack callee saved spills and restores to use push/pop instructions.Eric Christopher2010-11-181-0/+15
* Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,Evan Cheng2010-11-171-0/+5
* Code clean up. The peephole pass should be the one updating the instructionEvan Cheng2010-11-151-2/+1
* Revert this temporarily.Eric Christopher2010-11-111-5/+0
* Change the prologue and epilogue to use push/pop for the low ARM registers.Eric Christopher2010-11-111-0/+5
* Two sets of changes. Sorry they are intermingled.Evan Cheng2010-11-031-7/+15
* First part of refactoring ARM addrmode2 (load/store) instructions to be moreJim Grosbach2010-10-261-0/+1
* Use instruction itinerary to determine what instructions are 'cheap'.Evan Cheng2010-10-261-0/+2
* Tidy up redundant check.Bob Wilson2010-10-261-1/+1
* Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do anyJim Grosbach2010-10-191-0/+6
* Re-enable register pressure aware machine licm with fixes. Hoist() may haveEvan Cheng2010-10-191-0/+5
* Revert r116781 "- Add a hook for target to determine whether an instruction defDaniel Dunbar2010-10-191-5/+0
* - Add a hook for target to determine whether an instruction def isEvan Cheng2010-10-191-0/+5
* Don't recompute MachineRegisterInfo in the Optimize* method.Bill Wendling2010-10-181-0/+1
* MC machine encoding for simple aritmetic instructions that use a shiftedJim Grosbach2010-10-111-0/+5
* Code refactoring.Evan Cheng2010-10-071-0/+16
* - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. ThisEvan Cheng2010-10-061-0/+15
* Increase the number of bits used internally by the ARM target to represent theJim Grosbach2010-10-051-7/+7
* Thread the determination of branch prediction hit rates back through the if-c...Owen Anderson2010-10-011-3/+5
* Part one of switching to using a more sane heuristic for determining if-conve...Owen Anderson2010-09-281-3/+5
* Move the search for the appropriate AND instructionGabor Greif2010-09-211-2/+2
* handle the upper16/lower16 target operand flags on symbol references for MCJim Grosbach2010-09-171-16/+0
* Rename ConvertToSetZeroFlag to something more general.Bill Wendling2010-09-111-2/+2
* No need to recompute the SrcReg and CmpValue.Bill Wendling2010-09-101-1/+2
* Move some of the decision logic for converting an instruction into one that setsBill Wendling2010-09-101-2/+1
* Modify the comparison optimizations in the peephole optimizer to update theBill Wendling2010-09-101-1/+2
* Teach if-converter to be more careful with predicating instructions that wouldEvan Cheng2010-09-101-1/+1
* For each instruction itinerary class, specify the number of micro-ops eachEvan Cheng2010-09-091-0/+3
* Add a separate ARM instruction format for Saturate instructions.Bob Wilson2010-08-111-28/+29
* Use the "isCompare" machine instruction attribute instead of calling theBill Wendling2010-08-081-6/+6
* Add the Optimize Compares pass (disabled by default).Bill Wendling2010-08-061-0/+11
* eliminate the TargetInstrInfo::GetInstSizeInBytes hook. Chris Lattner2010-07-221-1/+1
* prune #includes a little.Chris Lattner2010-07-201-2/+3
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-161-6/+0
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-111-13/+0
* Replace copyRegToReg with copyPhysReg for ARM.Jakob Stoklund Olesen2010-07-111-6/+4
* Renumber NEON instruction formats to be consecutive.Bob Wilson2010-06-261-12/+12
* Rename ARM instruction formats NEONGetLnFrm, NEONSetLnFrm and NEONDupFrm toBob Wilson2010-06-251-3/+3
* Remove unused NEONFrm and ThumbMiscFrm ARM instruction formats.Bob Wilson2010-06-251-1/+3
* Change if-conversion block size limit checks to add some flexibility.Evan Cheng2010-06-251-0/+11
* We are missing opportunites to use ldm. Take code like this:Bill Wendling2010-06-231-0/+20
* Allow ARM if-converter to be run after post allocation scheduling.Evan Cheng2010-06-181-0/+4
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-171-1/+2
* Add instruction encoding for the Neon VMOV immediate instruction. This changesBob Wilson2010-06-111-1/+13
* Slightly change the meaning of the reMaterialize target hook when the originalJakob Stoklund Olesen2010-06-021-1/+1
* Clean up 80 column violations. No functional change.Jim Grosbach2010-06-021-1/+1
* Implement @llvm.returnaddress. rdar://8015977.Evan Cheng2010-05-221-0/+5
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-1/+2
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-2/+4
* Frame index can be negative.Evan Cheng2010-04-291-1/+1
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