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* Move the ARM reloc constants to Support/ELF.hJason W Kim2010-11-232-142/+4
* Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations.Bob Wilson2010-11-231-13/+109
* Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.Wesley Peck2010-11-232-52/+52
* Fix epilogue codegen to avoid leaving the stack pointer in an invalidEvan Cheng2010-11-223-23/+50
* Fix a compiler warning about Kind being used uninitializedDuncan Sands2010-11-221-1/+1
* Pseudos default to 4byte size, let the instruction size field noticeEric Christopher2010-11-211-1/+3
* More Thumb encodings.Bill Wendling2010-11-211-25/+82
* Add encoding for ARM "trap" instruction.Bill Wendling2010-11-211-4/+1
* The "trap" instruction is one of this which doesn't have a condition code. HackBill Wendling2010-11-211-2/+5
* - Give "trap" the correct encoding, at least according to Darwin's assembler.Bill Wendling2010-11-211-3/+10
* Use by-name rather than by-order operand matching for some NEON encodings.Owen Anderson2010-11-211-34/+34
* BR_JTadd is ARM-only, so use the proper pseudo class to get the predicate.Jim Grosbach2010-11-211-1/+1
* A few more thumb instruction MC encodings.Bill Wendling2010-11-201-16/+38
* Rewrite address handling to use a structure with all the possible addressEric Christopher2010-11-201-11/+76
* STRH only needs the additional operand, not t2STRH. Also invert conditionalEric Christopher2010-11-201-9/+5
* Move some more hooks to TargetFrameInfoAnton Korobeynikov2010-11-204-97/+100
* Add more Thumb add instruction encodings.Bill Wendling2010-11-201-12/+47
* Add Thumb encodings for some add instructions.Bill Wendling2010-11-201-6/+26
* Add more encodings for Thumb instructions.Bill Wendling2010-11-201-15/+30
* Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the sameBill Wendling2010-11-201-9/+21
* Fix ARM LDR* post-indexed operand encoding.Jim Grosbach2010-11-191-5/+5
* Encodings for the compare instructions.Bill Wendling2010-11-191-8/+19
* The Vm and Vn register fields must be the same for a register-register vmov.Owen Anderson2010-11-191-2/+6
* Fix a cut-n-paste-error.Evan Cheng2010-11-191-1/+1
* Operand namesJim Grosbach2010-11-191-4/+4
* trailing whitespaceJim Grosbach2010-11-191-16/+16
* Don't need to save piecemeal now.Eric Christopher2010-11-191-4/+2
* Update comment.Eric Christopher2010-11-191-3/+2
* Add encodings for some of the thumb ADD instructions. Tests will come once theBill Wendling2010-11-191-16/+44
* Update comment.Eric Christopher2010-11-191-1/+1
* Clarify operand names.Jim Grosbach2010-11-191-3/+3
* Refactor address mode handling into a single struct (ala x86), thisEric Christopher2010-11-191-50/+72
* Fix encoding for ARM MLS instruction.Jim Grosbach2010-11-191-3/+5
* Add ARM encoding information for STRD.Jim Grosbach2010-11-192-17/+4
* Shuffle things around a bit to keep like things together. Tidy up formatting.Jim Grosbach2010-11-191-20/+20
* Revert accidental commit.Bill Wendling2010-11-191-3/+4
* Change long binary encodings to use hex instead. It's more readable. AlsoBill Wendling2010-11-191-17/+20
* Factor out operand encoding bits for ARM addressing mode 2 store instructions.Jim Grosbach2010-11-192-58/+33
* Delete another dead class.Jim Grosbach2010-11-191-12/+0
* whitespace tweak.Jim Grosbach2010-11-191-1/+0
* Refactor PICSTR* instructions to really be pseudos. Nuke dead classes.Jim Grosbach2010-11-192-52/+6
* Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes.Jim Grosbach2010-11-192-7/+7
* Add ARM binary encoding information for the rest of the indexed loads.Jim Grosbach2010-11-192-175/+63
* Remove dead code.Jim Grosbach2010-11-191-10/+0
* ARM LDRD binary encoding.Jim Grosbach2010-11-192-22/+12
* Remove hard tabs.Jim Grosbach2010-11-191-2/+2
* Remove trailing whitespace.Jim Grosbach2010-11-191-62/+62
* Avoid release build warnings.Benjamin Kramer2010-11-192-4/+4
* Fix decoding ambiguities of stdrex and ldrex.Owen Anderson2010-11-191-4/+0
* These instructions are thumb2 only.Evan Cheng2010-11-191-1/+1
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