| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | For aligned load/store instructions, it's only required to know whether a | Jim Grosbach | 2010-01-19 | 1 | -0/+8 |
| * | 80 column violations | Jim Grosbach | 2010-01-06 | 1 | -4/+6 |
| * | Addressing mode 6 (load/store) instructions can't encode an immediate offset | Jim Grosbach | 2010-01-06 | 1 | -1/+4 |
| * | Use proper move instructions. Make the verifier happy. | Jakob Stoklund Olesen | 2009-12-22 | 1 | -1/+1 |
| * | Dynamic stack realignment use of sp register as source/dest register | Anton Korobeynikov | 2009-12-06 | 1 | -4/+27 |
| * | Factor the stack alignment calculations out into a target independent pass. | Jim Grosbach | 2009-12-02 | 1 | -63/+2 |
| * | Move default FrameReg val to getFrameIndexReference(). Otherwise, debug info ... | Jim Grosbach | 2009-11-22 | 1 | -1/+2 |
| * | Generate more correct debug info for frame indices. | Jim Grosbach | 2009-11-22 | 1 | -35/+50 |
| * | Revert 89562. We're being sneakier than I was giving us credit for, and this | Jim Grosbach | 2009-11-21 | 1 | -4/+1 |
| * | Darwin requires a frame pointer for all non-leaf functions to support correct | Jim Grosbach | 2009-11-21 | 1 | -1/+4 |
| * | Make the pass class name more explicit. | Jim Grosbach | 2009-11-16 | 1 | -4/+6 |
| * | make pass name a bit more clear | Jim Grosbach | 2009-11-16 | 1 | -1/+1 |
| * | Detect need for autoalignment of the stack earlier to catch spills more | Jim Grosbach | 2009-11-15 | 1 | -2/+45 |
| * | Add a bool flag to StackObjects telling whether they reference spill | David Greene | 2009-11-12 | 1 | -2/+4 |
| * | Now that the default is 'enabled,' a separate command line option for ARM is | Jim Grosbach | 2009-11-09 | 1 | -8/+1 |
| * | Enable dynamic stack realignment by default. | Jim Grosbach | 2009-11-09 | 1 | -1/+1 |
| * | Set dynamic stack realignment to real values. | Jim Grosbach | 2009-11-09 | 1 | -11/+3 |
| * | Use Unified Assembly Syntax for the ARM backend. | Jim Grosbach | 2009-11-09 | 1 | -4/+4 |
| * | Use aligned load/store instructions for spilling Q registers when we know the... | Jim Grosbach | 2009-11-08 | 1 | -2/+2 |
| * | Grammar. | Jim Grosbach | 2009-11-04 | 1 | -1/+1 |
| * | Now that the memory leak from McCat/08-main has been fixed (86056), re-enable | Jim Grosbach | 2009-11-04 | 1 | -3/+9 |
| * | If a function has no stack frame at all, dynamic realignment isn't necessary. | Jim Grosbach | 2009-11-04 | 1 | -0/+1 |
| * | dynamic stack realignment necessitates scanning the floating point callee- | Jim Grosbach | 2009-11-04 | 1 | -2/+2 |
| * | Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8. | Evan Cheng | 2009-11-03 | 1 | -2/+9 |
| * | Revert r85049, it is causing PR5367 | Anton Korobeynikov | 2009-11-03 | 1 | -0/+2 |
| * | Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. | Evan Cheng | 2009-11-01 | 1 | -6/+16 |
| * | Dial back the realignment a bit. | Jim Grosbach | 2009-10-30 | 1 | -9/+3 |
| * | To get more thorough testing from llc-beta nightly runs, do dynamic stack | Jim Grosbach | 2009-10-29 | 1 | -4/+9 |
| * | Cleanup now that frame index scavenging via post-pass is working for ARM and ... | Jim Grosbach | 2009-10-28 | 1 | -31/+4 |
| * | Enable virtual register based frame index scavenging by default for ARM & T2. | Jim Grosbach | 2009-10-27 | 1 | -2/+2 |
| * | Infrastructure for dynamic stack realignment on ARM. For now, this is off by | Jim Grosbach | 2009-10-27 | 1 | -2/+74 |
| * | Add ARM getMatchingSuperRegClass to handle S / D / Q cross regclass coalescing. | Evan Cheng | 2009-10-25 | 1 | -0/+27 |
| * | Missing piece of the ARM frame index post-scavenging conditionalization | Jim Grosbach | 2009-10-21 | 1 | -0/+1 |
| * | Conditionalize ARM/T2 frame index post-scavenging while working out fixes | Jim Grosbach | 2009-10-21 | 1 | -4/+31 |
| * | Disable by default while debugging | Jim Grosbach | 2009-10-20 | 1 | -1/+1 |
| * | add cmd line opt to disable frame index reuse for ARM and T2. debug aid. | Jim Grosbach | 2009-10-20 | 1 | -0/+7 |
| * | Enable post-pass frame index register scavenging for ARM and Thumb2 | Jim Grosbach | 2009-10-20 | 1 | -20/+8 |
| * | Enable allocation of R3 in Thumb1 | Jim Grosbach | 2009-10-19 | 1 | -4/+2 |
| * | Add register-reuse to frame-index register scavenging. When a target uses | Jim Grosbach | 2009-10-07 | 1 | -3/+5 |
| * | In Thumb1, the register scavenger is not always able to use an emergency | Jim Grosbach | 2009-10-05 | 1 | -3/+3 |
| * | Clarify comment phrasing. | Jim Grosbach | 2009-09-30 | 1 | -1/+1 |
| * | When checking whether we need to reserve a register for the scavenger, | Jim Grosbach | 2009-09-30 | 1 | -1/+7 |
| * | minor cleanup and add clarifying comment | Jim Grosbach | 2009-09-29 | 1 | -7/+9 |
| * | Adjust processFunctionBeforeCalleeSavedScan() to correctly reserve a stack | Jim Grosbach | 2009-09-28 | 1 | -2/+4 |
| * | Add some comments to clarify things that I discovered this week. | Bob Wilson | 2009-09-25 | 1 | -2/+6 |
| * | Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving | Jim Grosbach | 2009-09-24 | 1 | -3/+5 |
| * | Fix a typo in an assertion message. | Bob Wilson | 2009-09-18 | 1 | -1/+1 |
| * | Revert array initialization regclass change so that the initialization stays ... | Jim Grosbach | 2009-09-11 | 1 | -24/+20 |
| * | Update register class references to use the global constant ARM::*RegisterCla... | Jim Grosbach | 2009-09-11 | 1 | -25/+29 |
| * | Fix -Asserts warning, round two. | Daniel Dunbar | 2009-08-28 | 1 | -3/+2 |
