| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Trim unneeded header #include. | Jim Grosbach | 2012-12-11 | 1 | -1/+0 |
| * | ARM: Remove old testing option. | Jim Grosbach | 2012-12-11 | 1 | -5/+1 |
| * | ARM: Remove old testing options. | Jim Grosbach | 2012-12-11 | 1 | -13/+0 |
| * | Remove the old TRI::ResolveRegAllocHint() and getRawAllocationOrder() hooks. | Jakob Stoklund Olesen | 2012-12-04 | 1 | -258/+0 |
| * | Implement ARMBaseRegisterInfo::getRegAllocationHints(). | Jakob Stoklund Olesen | 2012-12-03 | 1 | -0/+59 |
| * | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 2012-12-03 | 1 | -7/+7 |
| * | Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering all | Chad Rosier | 2012-11-06 | 1 | -0/+5 |
| * | Remove ARMBaseRegisterInfo::isReservedReg(). | Jakob Stoklund Olesen | 2012-10-26 | 1 | -37/+8 |
| * | Add GPRPair Register class to ARM. | Jakob Stoklund Olesen | 2012-10-26 | 1 | -0/+12 |
| * | Remove the canCombineSubRegIndices() target hook. | Jakob Stoklund Olesen | 2012-10-26 | 1 | -116/+0 |
| * | Create enums for the different attributes. | Bill Wendling | 2012-10-09 | 1 | -2/+3 |
| * | Remove the `hasFnAttr' method from Function. | Bill Wendling | 2012-09-26 | 1 | -1/+1 |
| * | This patch introduces A15 as a target in LLVM. | Silviu Baranga | 2012-09-13 | 1 | -1/+1 |
| * | Revert r162713: "Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ... | Jakob Stoklund Olesen | 2012-08-28 | 1 | -7/+3 |
| * | Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ARM. | Jakob Stoklund Olesen | 2012-08-27 | 1 | -3/+7 |
| * | Add support for the ARM GHC calling convention, this patch was in 3.0, | Eric Christopher | 2012-08-03 | 1 | -0/+12 |
| * | Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). | Jakob Stoklund Olesen | 2012-05-07 | 1 | -2/+4 |
| * | Implement a bastardized ABI. | Evan Cheng | 2012-04-27 | 1 | -2/+4 |
| * | This patch fixes a problem which arose when using the Post-RA scheduler | Preston Gurd | 2012-04-23 | 1 | -0/+5 |
| * | Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s... | Craig Topper | 2012-04-20 | 1 | -3/+3 |
| * | Replace uses of ARMBaseInstrInfo and ARMTargetMachine with the Base versions. | Craig Topper | 2012-03-25 | 1 | -1/+0 |
| * | remove unused variable | Matt Beaumont-Gay | 2012-03-20 | 1 | -1/+0 |
| * | Require a base pointer for stack realignment when SP may vary dynamically. | Bob Wilson | 2012-03-20 | 1 | -2/+3 |
| * | Remove some redundant checks. | Bob Wilson | 2012-03-20 | 1 | -2/+1 |
| * | Reorder includes to match coding standards. Fix an issue or two exposed by that. | Craig Topper | 2012-03-17 | 1 | -1/+1 |
| * | Split fpscr into two registers: FPSCR and FPSCR_NZCV. | Lang Hames | 2012-03-06 | 1 | -0/+1 |
| * | Use uint16_t instead of unsigned to store registers in reg classes. Reduces s... | Craig Topper | 2012-03-04 | 1 | -13/+13 |
| * | Use uint16_t to store registers in callee saved register tables to reduce siz... | Craig Topper | 2012-03-04 | 1 | -1/+1 |
| * | Enable ARM base pointer when calling functions with large arguments. | Jakob Stoklund Olesen | 2012-02-28 | 1 | -1/+21 |
| * | Remove extra semi-colons. | Chad Rosier | 2012-02-22 | 1 | -1/+1 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE ba... | Lang Hames | 2012-02-17 | 1 | -1/+0 |
| * | Oop - r150653 + r150654 broke one of my test cases. Backing out for now... | Lang Hames | 2012-02-16 | 1 | -0/+1 |
| * | FPSCR shouldn't be reserved. | Lang Hames | 2012-02-16 | 1 | -1/+0 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -4/+0 |
| * | Implement ARMBaseRegisterInfo::getCallPreservedMask(). | Jakob Stoklund Olesen | 2012-01-17 | 1 | -19/+5 |
| * | Reapply r146997, "Heed spill slot alignment on ARM." | Jakob Stoklund Olesen | 2012-01-05 | 1 | -1/+1 |
| * | Avoid reserving an ARM base pointer during register allocation. | Jakob Stoklund Olesen | 2012-01-05 | 1 | -2/+17 |
| * | Revert r146997, "Heed spill slot alignment on ARM." | Jakob Stoklund Olesen | 2012-01-03 | 1 | -1/+1 |
| * | Heed spill slot alignment on ARM. | Jakob Stoklund Olesen | 2011-12-20 | 1 | -1/+1 |
| * | ARM target code clean up. Check for iOS, not Darwin where it makes sense. | Evan Cheng | 2011-12-20 | 1 | -3/+3 |
| * | Emit a getMatchingSuperRegClass() implementation for every target. | Jakob Stoklund Olesen | 2011-12-19 | 1 | -98/+0 |
| * | Move global variables in TargetMachine into new TargetOptions class. As an API | Nick Lewycky | 2011-12-02 | 1 | -2/+2 |
| * | Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :( | Chad Rosier | 2011-10-20 | 1 | -2/+5 |
| * | Add support for dynamic stack realignment when in thumb1 mode. | Chad Rosier | 2011-10-18 | 1 | -5/+2 |
| * | Revert r141529. This is causing failures in the test-suite, like bigstack and... | Bill Wendling | 2011-10-11 | 1 | -11/+2 |
| * | When getting the number of bits necessary for addressing mode | Bill Wendling | 2011-10-10 | 1 | -2/+11 |
| * | Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions." | Chad Rosier | 2011-10-01 | 1 | -2/+5 |
| * | Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact | Chad Rosier | 2011-10-01 | 1 | -5/+2 |
| * | Store sub-class lists as a bit vector. | Jakob Stoklund Olesen | 2011-09-30 | 1 | -1/+1 |
