| Commit message (Expand) | Author | Age | Files | Lines |
... | |
* | Tidy up a bit. | Jim Grosbach | 2011-09-13 | 1 | -152/+78 |
* | Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical | Evan Cheng | 2011-08-30 | 1 | -0/+7 |
* | Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode. | Jim Grosbach | 2011-08-24 | 1 | -3/+3 |
* | Silence a bunch (but not all) "variable written but not read" warnings | Duncan Sands | 2011-08-12 | 1 | -0/+1 |
* | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 2011-07-20 | 1 | -1/+1 |
* | Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for | Evan Cheng | 2011-07-18 | 1 | -1/+0 |
* | Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down | Evan Cheng | 2011-07-18 | 1 | -13/+1 |
* | Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previ... | Frits van Bommel | 2011-07-18 | 1 | -12/+12 |
* | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng | 2011-07-14 | 1 | -1/+0 |
* | Remove redundant Thumb2 ADD/SUB SP instruction definitions. | Jim Grosbach | 2011-06-29 | 1 | -4/+0 |
* | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng | 2011-06-28 | 1 | -2/+1 |
* | Hide more details in tablegen generated MCRegisterInfo ctor function. | Evan Cheng | 2011-06-28 | 1 | -2/+1 |
* | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -5/+5 |
* | More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. | Evan Cheng | 2011-06-27 | 1 | -1/+1 |
* | Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc | Evan Cheng | 2011-06-27 | 1 | -1/+3 |
* | Starting to refactor Target to separate out code that's needed to fully describe | Evan Cheng | 2011-06-24 | 1 | -3/+4 |
* | Reserve D16-D13 on subtargets that don't support them. | Jakob Stoklund Olesen | 2011-06-18 | 1 | -0/+6 |
* | Explicitly invoke ArrayRef constructor to keep gcc happy. | Jakob Stoklund Olesen | 2011-06-17 | 1 | -12/+12 |
* | Rename TRI::getAllocationOrder() to getRawAllocationOrder(). | Jakob Stoklund Olesen | 2011-06-16 | 1 | -38/+22 |
* | Use the dwarf->llvm mapping to print register names in the cfi | Rafael Espindola | 2011-05-30 | 1 | -0/+4 |
* | Reuse the TargetInstrDesc. | Cameron Zwarich | 2011-05-19 | 1 | -2/+1 |
* | Correctly constrain a register class when computing frame offsets, as the Thumb2 | Cameron Zwarich | 2011-05-19 | 1 | -0/+4 |
* | Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on regist... | Jakob Stoklund Olesen | 2011-04-26 | 1 | -0/+19 |
* | Avoid write-after-write issue hazards for Cortex-A9. | Bob Wilson | 2011-04-19 | 1 | -0/+23 |
* | Fix a ton of comment typos found by codespell. Patch by | Chris Lattner | 2011-04-15 | 1 | -1/+1 |
* | Ignore special ARM allocation hints for unexpected register classes. | Jakob Stoklund Olesen | 2011-03-25 | 1 | -0/+4 |
* | Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo. | Cameron Zwarich | 2011-03-07 | 1 | -0/+20 |
* | Implement frame unwinding information emission for Thumb1. Not finished yet b... | Anton Korobeynikov | 2011-03-05 | 1 | -2/+3 |
* | Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a... | Anton Korobeynikov | 2011-01-10 | 1 | -13/+13 |
* | Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. | Jakob Stoklund Olesen | 2011-01-10 | 1 | -1/+1 |
* | During local stack slot allocation, the materializeFrameBaseRegister function | Bill Wendling | 2010-12-17 | 1 | -7/+13 |
* | When using multiple instructions to reference a frame index, make sure to | Jim Grosbach | 2010-12-09 | 1 | -0/+5 |
* | Move more PEI-related hooks to TFI | Anton Korobeynikov | 2010-11-27 | 1 | -322/+0 |
* | Fix epilogue codegen to avoid leaving the stack pointer in an invalid | Evan Cheng | 2010-11-22 | 1 | -3/+4 |
* | Move some more hooks to TargetFrameInfo | Anton Korobeynikov | 2010-11-20 | 1 | -92/+4 |
* | Move hasFP() and few related hooks to TargetFrameInfo. | Anton Korobeynikov | 2010-11-18 | 1 | -58/+25 |
* | Code clean up. | Evan Cheng | 2010-11-18 | 1 | -6/+2 |
* | First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ou... | Anton Korobeynikov | 2010-11-15 | 1 | -331/+0 |
* | Revert this temporarily. | Eric Christopher | 2010-11-11 | 1 | -25/+17 |
* | Change the prologue and epilogue to use push/pop for the low ARM registers. | Eric Christopher | 2010-11-11 | 1 | -17/+25 |
* | Revert r114340 (improvements in Darwin function prologue/epilogue), as it broke | Jim Grosbach | 2010-11-02 | 1 | -23/+89 |
* | Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like | Jim Grosbach | 2010-10-27 | 1 | -2/+2 |
* | Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on | Jim Grosbach | 2010-10-27 | 1 | -1/+1 |
* | First part of refactoring ARM addrmode2 (load/store) instructions to be more | Jim Grosbach | 2010-10-26 | 1 | -4/+6 |
* | Nuke extraneous comment. It's applicable elsewhere, but not in this func. | Jim Grosbach | 2010-10-26 | 1 | -2/+0 |
* | Nuke a commented out bit that got missed a while back. | Jim Grosbach | 2010-10-19 | 1 | -1/+1 |
* | For Thumb2, try to use frame pointer references for stack slots even when a | Jim Grosbach | 2010-10-18 | 1 | -2/+10 |
* | ARM addrmode4 instructions (ldm, stm and friends) can't encode an immediate | Jim Grosbach | 2010-10-18 | 1 | -1/+2 |
* | Grammar tweak. | Jim Grosbach | 2010-10-18 | 1 | -1/+1 |
* | Simplify ARM callee-saved register handling by removing the distinction | Jim Grosbach | 2010-09-20 | 1 | -89/+23 |