| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Replace uses of ARMBaseInstrInfo and ARMTargetMachine with the Base versions. | Craig Topper | 2012-03-25 | 1 | -6/+6 |
| * | ARM BL/BLX instruction fixups should use relocations. | Jim Grosbach | 2012-02-27 | 1 | -0/+2 |
| * | Widen the instruction encoder that TblGen emits to a 64 bits, which should ac... | Owen Anderson | 2012-01-24 | 1 | -1/+1 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -3/+0 |
| * | First chunk of MachineInstr bundle support. | Evan Cheng | 2011-12-06 | 1 | -1/+1 |
| * | Use the new ARMConstantPoolSymbol class to handle external symbols. | Bill Wendling | 2011-10-01 | 1 | -2/+3 |
| * | Switch over to using ARMConstantPoolConstant for global variables, functions, | Bill Wendling | 2011-10-01 | 1 | -1/+1 |
| * | Zap some junk from the ARM instruction descriptions. | Eli Friedman | 2011-09-13 | 1 | -2/+0 |
| * | Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. | Jim Grosbach | 2011-09-09 | 1 | -0/+2 |
| * | Thumb2 assembly parsing and encoding for LDRD(immediate). | Jim Grosbach | 2011-09-08 | 1 | -0/+2 |
| * | Tidy up. Formatting. | Jim Grosbach | 2011-09-02 | 1 | -4/+4 |
| * | Improve encoding support for BLX with immediat eoperands, and fix a BLX decod... | Owen Anderson | 2011-08-26 | 1 | -0/+2 |
| * | ARM clean up the imm_sr operand class representation. | Jim Grosbach | 2011-08-17 | 1 | -2/+0 |
| * | Fix encodings for Thumb ASR and LSR immediate operands. They encode the rang... | Owen Anderson | 2011-08-08 | 1 | -0/+2 |
| * | ARM refactoring assembly parsing of memory address operands. | Jim Grosbach | 2011-08-03 | 1 | -0/+2 |
| * | ARM parsing and encoding of SBFX and UBFX. | Jim Grosbach | 2011-07-27 | 1 | -2/+0 |
| * | ARM cleanup of rot_imm encoding. | Jim Grosbach | 2011-07-26 | 1 | -2/+0 |
| * | Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn n... | Owen Anderson | 2011-07-21 | 1 | -1/+3 |
| * | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 2011-07-20 | 1 | -1/+1 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -75/+75 |
| * | Fix ssat and ssat16 encodings for ARM and Thumb. The bit position value | Bruno Cardoso Lopes | 2011-05-31 | 1 | -0/+2 |
| * | Fixed MC encoding for index_align for VLD1/VST1 (single element from one lane... | Mon P Wang | 2011-05-09 | 1 | -0/+3 |
| * | Fix the non-MC encoding of pkhbt and pkhtb. | Eric Christopher | 2011-05-07 | 1 | -0/+6 |
| * | Rename the narrow shift right immediate operands to "shr_imm*" operands. Also | Bill Wendling | 2011-03-07 | 1 | -3/+5 |
| * | PR8053: Fix encoding of S bit in some ARM instructions. | Bob Wilson | 2011-03-03 | 1 | -1/+1 |
| * | Narrow right shifts need to encode their immediates differently from a normal | Bill Wendling | 2011-03-01 | 1 | -0/+7 |
| * | Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps. | Jason W Kim | 2011-02-04 | 1 | -0/+2 |
| * | Add support for parsing and encoding ARM's official syntax for the BFI instru... | Bruno Cardoso Lopes | 2011-01-18 | 1 | -0/+2 |
| * | Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step | Evan Cheng | 2011-01-13 | 1 | -1/+1 |
| * | Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755 | Jim Grosbach | 2010-12-14 | 1 | -0/+2 |
| * | The tLDR et al instructions were emitting either a reg/reg or reg/imm | Bill Wendling | 2010-12-14 | 1 | -1/+3 |
| * | Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering ... | Owen Anderson | 2010-12-14 | 1 | -0/+2 |
| * | Revert r121721, which broke buildbots. | Owen Anderson | 2010-12-13 | 1 | -2/+0 |
| * | Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provid... | Owen Anderson | 2010-12-13 | 1 | -0/+2 |
| * | In Thumb2, direct branches can be encoded as either a "short" conditional bra... | Owen Anderson | 2010-12-13 | 1 | -0/+2 |
| * | Fix encoding of Thumb1 LDRB and STRB. | Owen Anderson | 2010-12-10 | 1 | -0/+2 |
| * | Thumb unconditional branch binary encoding. rdar://8754994 | Jim Grosbach | 2010-12-10 | 1 | -0/+2 |
| * | Thumb conditional branch binary encodings. rdar://8745367 | Jim Grosbach | 2010-12-10 | 1 | -0/+2 |
| * | Thumb ldr reg+imm offsets were encoded incorrectly. The scaling factor of the | Bill Wendling | 2010-12-09 | 1 | -5/+1 |
| * | Rename the encoder method for t_cbtarget to match. | Jim Grosbach | 2010-12-09 | 1 | -1/+1 |
| * | The BLX instruction is encoded differently than the BL, because why not? In | Bill Wendling | 2010-12-09 | 1 | -0/+2 |
| * | Support the "target" encodings for the CB[N]Z instructions. | Bill Wendling | 2010-12-08 | 1 | -0/+2 |
| * | Add support for loading from a constant pool. | Bill Wendling | 2010-12-08 | 1 | -0/+2 |
| * | Binary encoding for ARM tLDRspi and tSTRspi. | Jim Grosbach | 2010-12-07 | 1 | -0/+2 |
| * | Add fixup for Thumb1 BL/BLX instructions. | Jim Grosbach | 2010-12-06 | 1 | -0/+2 |
| * | Add a post encoder method to the VFP instructions to convert them to the Thumb2 | Bill Wendling | 2010-12-01 | 1 | -0/+2 |
| * | Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADR | Jim Grosbach | 2010-12-01 | 1 | -0/+2 |
| * | Add correct encodings for STRD and LDRD, including fixup support. Additional... | Owen Anderson | 2010-12-01 | 1 | -0/+2 |
| * | * Add support for encoding t_addrmode_s2 and t_addrmode_s1. They are the same as | Bill Wendling | 2010-11-30 | 1 | -0/+4 |
| * | Add encoding support for Thumb2 PLD and PLI instructions. | Owen Anderson | 2010-11-30 | 1 | -0/+2 |
