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path: root/lib/Target/ARM/ARMISelLowering.h
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* Reorder includes to match coding standards. Fix an issue or two exposed by that.Craig Topper2012-03-171-0/+1
* Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints onLang Hames2012-03-151-0/+2
* Re-commit r151623 with fix. Only issue special no-return calls if it's a dire...Evan Cheng2012-02-281-1/+1
* Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre...Daniel Dunbar2012-02-281-1/+1
* Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng2012-02-281-1/+1
* Optimize a couple of common patterns involving conditional moves where the falseEvan Cheng2012-02-231-0/+4
* Make all pointers to TargetRegisterClass const since they are all pointers to...Craig Topper2012-02-221-1/+1
* Fix ARM SjLj-EH dispatch setup code. <rdar://problem/10444602>Bob Wilson2011-11-161-5/+0
* Add vmov.f32 to materialize f32 immediate splats which cannot be handled byEvan Cheng2011-11-151-0/+3
* Fixed parameter name.Lang Hames2011-11-021-1/+1
* Try to lower memset/memcpy/memmove to vector instructions on ARM where the al...Lang Hames2011-11-021-1/+6
* Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emitBill Wendling2011-10-071-0/+3
* Refactor some of the code that sets up the entry block for SjLj EH. No functi...Bill Wendling2011-10-061-0/+4
* Check-pointing the new SjLj EH lowering.Bill Wendling2011-10-031-0/+3
* ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.Jim Grosbach2011-09-301-6/+0
* Add codegen support for vector select (in the IR this means a selectDuncan Sands2011-09-061-0/+3
* 64-bit atomic cmpxchg for ARM.Eli Friedman2011-08-311-1/+2
* Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next.Eli Friedman2011-08-311-1/+16
* Follow up to r138791.Evan Cheng2011-08-301-0/+3
* Change ARM / Thumb2 addc / adde and subc / sube modeling to use physicalEvan Cheng2011-08-301-0/+5
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-181-1/+1
* Improve codegen for select's:Evan Cheng2011-07-131-0/+1
* Remove getRegClassForInlineAsmConstraint from the ARM port.Eric Christopher2011-06-291-3/+0
* Have LowerOperandForConstraint handle multiple character constraints.Eric Christopher2011-06-021-1/+1
* Make the logic for determining function alignment more explicit. No function...Eli Friedman2011-05-061-3/+0
* Add an unfolded offset field to LSR's Formula record. This is used toDan Gohman2011-05-031-0/+6
* ARM and Thumb2 support for atomic MIN/MAX/UMIN/UMAX loads.Jim Grosbach2011-04-261-0/+5
* Thumb2 and ARM add/subtract with carry fixes.Andrew Trick2011-04-231-0/+1
* whitespaceAndrew Trick2011-04-231-6/+6
* ARM byval support. Will be enabled by another patch to the FE. <rdar://prob...Stuart Hastings2011-04-201-1/+8
* Add a ARM-specific SD node for VBSL so that forms with a constant first operandCameron Zwarich2011-03-301-0/+3
* Re-apply r127953 with fixes: eliminate empty return block if it has no predec...Evan Cheng2011-03-211-0/+2
* Revert r127953, "SimplifyCFG has stopped duplicating returns into predecessorsDaniel Dunbar2011-03-191-2/+0
* SimplifyCFG has stopped duplicating returns into predecessors to canonicalize IREvan Cheng2011-03-191-0/+2
* Some minor cleanups based on feedback.Bill Wendling2011-03-151-2/+0
* Generate a VTBL instruction instead of a series of loads and stores when weBill Wendling2011-03-141-0/+4
* Fix a compiler crash where a Glue value had multiple uses. Radar 9049552.Bob Wilson2011-03-081-0/+1
* Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.Cameron Zwarich2011-03-071-3/+0
* Remove unused conditional negate operations.Bob Wilson2011-03-051-1/+0
* Support for byval parameters on ARM. Will be enabled by a forthcomingStuart Hastings2011-02-281-0/+3
* Add codegen support for using post-increment NEON load/store instructions.Bob Wilson2011-02-071-1/+22
* Given a pair of floating point load and store, if there are no other uses ofEvan Cheng2011-02-021-2/+4
* Last round of fixes for movw + movt global address codegen.Evan Cheng2011-01-211-0/+2
* Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g.Evan Cheng2011-01-171-0/+2
* Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.Evan Cheng2011-01-081-0/+2
* Lower some BUILD_VECTORS using VEXT+shuffle.Bob Wilson2011-01-071-0/+4
* Enable sibling call optimization of libcalls which are expanded duringEvan Cheng2010-11-301-0/+2
* Add support for NEON VLD2-dup instructions.Bob Wilson2010-11-281-1/+6
* Add support for ARM's specialized vector-compare-against-zero instructions.Owen Anderson2010-11-081-0/+5
* Disallow the certain NEON modified-immediate forms when generating vorr or vbic.Owen Anderson2010-11-051-0/+7
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