| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | trailing whitespace | Jim Grosbach | 2010-11-19 | 1 | -16/+16 |
| * | Add ARM encoding information for STRD. | Jim Grosbach | 2010-11-19 | 1 | -15/+2 |
| * | Factor out operand encoding bits for ARM addressing mode 2 store instructions. | Jim Grosbach | 2010-11-19 | 1 | -1/+17 |
| * | Delete another dead class. | Jim Grosbach | 2010-11-19 | 1 | -12/+0 |
| * | whitespace tweak. | Jim Grosbach | 2010-11-19 | 1 | -1/+0 |
| * | Refactor PICSTR* instructions to really be pseudos. Nuke dead classes. | Jim Grosbach | 2010-11-19 | 1 | -43/+0 |
| * | Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes. | Jim Grosbach | 2010-11-19 | 1 | -2/+2 |
| * | Add ARM binary encoding information for the rest of the indexed loads. | Jim Grosbach | 2010-11-19 | 1 | -126/+15 |
| * | Remove dead code. | Jim Grosbach | 2010-11-19 | 1 | -10/+0 |
| * | ARM LDRD binary encoding. | Jim Grosbach | 2010-11-19 | 1 | -17/+3 |
| * | Add ARM encoding information for LDRH post-increment. | Jim Grosbach | 2010-11-18 | 1 | -7/+13 |
| * | Fill out the set of Thumb2 multiplication operator encodings. | Owen Anderson | 2010-11-18 | 1 | -13/+0 |
| * | ARMPseudoInst instructions should default to being considered a single 4-byte | Jim Grosbach | 2010-11-18 | 1 | -0/+3 |
| * | ARM PseudoInst instructions don't need or use an assembler string. Get rid of | Jim Grosbach | 2010-11-18 | 1 | -5/+3 |
| * | Add FIXME. | Jim Grosbach | 2010-11-18 | 1 | -0/+3 |
| * | Refactor the ARM PICADD and PICLDR* instructions to really be pseudos and not | Jim Grosbach | 2010-11-18 | 1 | -19/+8 |
| * | Refactor a few ARM load instructions to better parameterize things and re-use | Jim Grosbach | 2010-11-18 | 1 | -74/+10 |
| * | More ARM encoding bits. LDRH now encodes properly. | Jim Grosbach | 2010-11-17 | 1 | -21/+38 |
| * | Add binary emission stuff for VLDM/VSTM. This reuses the | Bill Wendling | 2010-11-17 | 1 | -1/+23 |
| * | - Remove dead patterns. | Bill Wendling | 2010-11-16 | 1 | -32/+0 |
| * | ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding. | Jim Grosbach | 2010-11-15 | 1 | -0/+2 |
| * | add fields to the .td files unconditionally, simplifying tblgen a bit. | Chris Lattner | 2010-11-15 | 1 | -5/+5 |
| * | Add *_ldst_mult multiclasses to the ARM back-end. These will be used in the | Bill Wendling | 2010-11-13 | 1 | -0/+12 |
| * | More ARM load/store indexed refactoring. Also fix an incorrect IndexMode | Jim Grosbach | 2010-11-13 | 1 | -42/+13 |
| * | Refactor to parameterize some ARM load/store encoding patterns. Preparatory | Jim Grosbach | 2010-11-12 | 1 | -74/+12 |
| * | Add some missing isel predicates on def : pat patterns to avoid generating VF... | Evan Cheng | 2010-11-12 | 1 | -27/+0 |
| * | Kill more unused stuff. | Jim Grosbach | 2010-11-12 | 1 | -43/+0 |
| * | Remove unused class. | Jim Grosbach | 2010-11-12 | 1 | -8/+0 |
| * | Encoding for ARM LDRSB instructions. | Jim Grosbach | 2010-11-12 | 1 | -7/+12 |
| * | Fill out support for Thumb2 encodings of NEON instructions. | Owen Anderson | 2010-11-11 | 1 | -0/+2 |
| * | Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. | Owen Anderson | 2010-11-11 | 1 | -0/+2 |
| * | Add support for Thumb2 encodings of NEON data processing instructions, using ... | Owen Anderson | 2010-11-11 | 1 | -0/+1 |
| * | Encoding for ARM LDRSH_POST. | Jim Grosbach | 2010-11-11 | 1 | -7/+13 |
| * | Encoding for ARM LDRSH and LDRSH_PRE. Cannonicalize operand names. | Jim Grosbach | 2010-11-11 | 1 | -14/+24 |
| * | ARM STRH encoding information. | Jim Grosbach | 2010-11-11 | 1 | -7/+12 |
| * | Move LDM predicate operand encoding into base clase. Add STM missing STM | Jim Grosbach | 2010-11-10 | 1 | -2/+10 |
| * | ARM LDM encoding for the mode (ia, ib, da, db) operand. | Jim Grosbach | 2010-11-10 | 1 | -1/+3 |
| * | Fix ARM encoding of non-return LDM instructions. | Jim Grosbach | 2010-11-10 | 1 | -1/+1 |
| * | Fix ARM encoding of LDM+Return instruction. | Jim Grosbach | 2010-11-10 | 1 | -2/+4 |
| * | Add encoding for VSTR. | Bill Wendling | 2010-11-04 | 1 | -0/+22 |
| * | Revert r118097 to fix buildbots. | Owen Anderson | 2010-11-02 | 1 | -4/+4 |
| * | Since these fields are not exactly equivalent to the encoded field, rename th... | Owen Anderson | 2010-11-02 | 1 | -4/+4 |
| * | Factor out a common encoding class for loads and stores with a lane parameter. | Owen Anderson | 2010-11-02 | 1 | -0/+8 |
| * | Add correct NEON encodings for the "multiple single elements" form of vld. | Owen Anderson | 2010-11-02 | 1 | -0/+9 |
| * | Move the machine operand MC encoding patterns to the parent classes. | Bill Wendling | 2010-11-01 | 1 | -0/+13 |
| * | Add 'IsThumb' predicate to patterns marked as 'IsThumb1Only'. The latter gates | Jim Grosbach | 2010-11-01 | 1 | -6/+6 |
| * | Move instruction encoding bits into the parent class and remove the temporary | Bill Wendling | 2010-11-01 | 1 | -0/+59 |
| * | fix the !eq operator in tblgen to return a bit instead of an int. | Chris Lattner | 2010-10-31 | 1 | -0/+3 |
| * | Encode the register list operands for ARM mode LDM/STM instructions. | Jim Grosbach | 2010-10-30 | 1 | -0/+4 |
| * | ARM encoding information for CLREX, SWP and SWPB. Add comment for sjlj pseudo... | Jim Grosbach | 2010-10-29 | 1 | -0/+13 |
