| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Added support for disassembling unpredictable swp/swpb ARM instructions. | Silviu Baranga | 2012-04-18 | 1 | -0/+1 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE... | James Molloy | 2012-02-09 | 1 | -0/+8 |
| * | NEON add correct predicates for some asm aliases. | Jim Grosbach | 2012-01-24 | 1 | -0/+9 |
| * | Simplify some NEON assembly pseudo definitions. | Jim Grosbach | 2012-01-23 | 1 | -69/+0 |
| * | ARM VFP add encoding of the bitcount to fixed-point<-->floating point. insns. | Jim Grosbach | 2011-12-22 | 1 | -0/+3 |
| * | ARM add more 'gas' compatibility aliases for NEON instructions. | Jim Grosbach | 2011-12-13 | 1 | -0/+6 |
| * | ARM VSHR implied destination operand form aliases. | Jim Grosbach | 2011-12-08 | 1 | -0/+8 |
| * | ARM tidy up and remove no longer needed InstAlias definitions. | Jim Grosbach | 2011-12-07 | 1 | -67/+8 |
| * | ARM Implement ARM ARM Table A7-3 via TokenAlias. | Jim Grosbach | 2011-12-07 | 1 | -0/+20 |
| * | ARM assembly parsing for the rest of the VMUL data type aliases. | Jim Grosbach | 2011-12-05 | 1 | -1/+1 |
| * | ARM assmebler parsing for two-operand VMUL instructions. | Jim Grosbach | 2011-12-05 | 1 | -0/+2 |
| * | ARM VLD1 single lane assembly parsing. | Jim Grosbach | 2011-12-02 | 1 | -2/+2 |
| * | Clean up aliases for ARM VLD1 single-lane assembly parsing a bit. | Jim Grosbach | 2011-12-02 | 1 | -15/+92 |
| * | ARM assembly parsing for data type suffices on NEON VMOV aliases. | Jim Grosbach | 2011-11-15 | 1 | -0/+17 |
| * | Split out the plain '.{8|16|32|64}' suffix handling. | Jim Grosbach | 2011-11-14 | 1 | -8/+24 |
| * | ARM parsing optional datatype suffix for VAND/VEOR/VORR instructions. | Jim Grosbach | 2011-11-14 | 1 | -1/+20 |
| * | ARM VLDR/VSTR instructions don't need a size suffix. | Jim Grosbach | 2011-11-14 | 1 | -0/+2 |
| * | ARM assembly parsing type suffix options for VLDR/VSTR. | Jim Grosbach | 2011-11-14 | 1 | -0/+19 |
| * | ARM refactor simple immediate asm operand render methods. | Jim Grosbach | 2011-11-12 | 1 | -2/+2 |
| * | ARM assembly parsing for ASR(immediate). | Jim Grosbach | 2011-11-10 | 1 | -7/+13 |
| * | ARM VLD/VST assembly parsing for symbolic address operands. | Jim Grosbach | 2011-11-01 | 1 | -0/+20 |
| * | Reapply r143202, with a manual decoding hook for SWP. This change inadvertan... | Owen Anderson | 2011-10-28 | 1 | -0/+2 |
| * | ARM NEON assembly parsing and encoding for VDUP(scalar). | Jim Grosbach | 2011-10-07 | 1 | -1/+0 |
| * | ARM assembly parsing and encoding for VMRS/FMSTAT. | Jim Grosbach | 2011-10-03 | 1 | -0/+4 |
| * | Port more encoding tests to decoding tests, and correct an improper Thumb2 pr... | Owen Anderson | 2011-09-12 | 1 | -0/+4 |
| * | Thumb2 assembly parsing and encoding for LDRD(immediate). | Jim Grosbach | 2011-09-08 | 1 | -9/+8 |
| * | Thumb2 assembly parsing and encoding for LDR post-indexed. | Jim Grosbach | 2011-09-08 | 1 | -3/+3 |
| * | Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback. | Jim Grosbach | 2011-09-08 | 1 | -6/+36 |
| * | Fix Thumb2 decoding of CPS instructions to mirror ARM decoding of the same in... | Owen Anderson | 2011-08-23 | 1 | -1/+0 |
| * | Reject invalid imod values in t2CPS instructions. | Owen Anderson | 2011-08-22 | 1 | -0/+1 |
| * | Clean up predicates on ARM target instruction aliases. | Jim Grosbach | 2011-08-22 | 1 | -0/+11 |
| * | Thumb assembly parsing and encoding for MOV. | Jim Grosbach | 2011-08-19 | 1 | -1/+1 |
| * | Tidy up. Tab character. | Jim Grosbach | 2011-08-19 | 1 | -1/+1 |
| * | Tab characters. | Jim Grosbach | 2011-08-19 | 1 | -2/+2 |
| * | Separate out Thumb1 instructions that need an S bit operand from those that d... | Owen Anderson | 2011-08-16 | 1 | -0/+1 |
| * | ARM thumb assembly parsing for arithmetic flag setting instructions. | Jim Grosbach | 2011-08-16 | 1 | -0/+6 |
| * | Specify a necessary fixed bit for VLD3DUP, and otherwise rearrange the Thumb2... | Owen Anderson | 2011-08-15 | 1 | -2/+4 |
| * | Remove dead classes. | Owen Anderson | 2011-08-15 | 1 | -33/+0 |
| * | Update comment to reflect MC target machine refactor. | Jim Grosbach | 2011-08-15 | 1 | -1/+1 |
| * | Fix decoding of ARM-mode STRH. | Owen Anderson | 2011-08-12 | 1 | -0/+1 |
| * | Tidy up. Remove unused template parameter. | Jim Grosbach | 2011-08-11 | 1 | -1/+1 |
| * | ARM STRD assembly parsing and encoding. | Jim Grosbach | 2011-08-11 | 1 | -29/+0 |
| * | Continue to tighten decoding by performing more operand validation. | Owen Anderson | 2011-08-11 | 1 | -0/+1 |
| * | Add initial support for decoding NEON instructions in Thumb2 mode. | Owen Anderson | 2011-08-10 | 1 | -2/+4 |
| * | Replace the existing ARM disassembler with a new one based on the FixedLenDec... | Owen Anderson | 2011-08-09 | 1 | -0/+14 |
| * | Fix broken encodings for the Thumb2 LDRD/STRD instructions. | Owen Anderson | 2011-08-04 | 1 | -0/+21 |
| * | ARM refactoring assembly parsing of memory address operands. | Jim Grosbach | 2011-08-03 | 1 | -38/+7 |
| * | Split am2offset into register addend and immediate addend forms, necessary fo... | Owen Anderson | 2011-07-26 | 1 | -3/+22 |
| * | ARM fix for LDREX source register encoding. | Jim Grosbach | 2011-07-26 | 1 | -2/+2 |
