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path: root/lib/Target/ARM/ARMInstrInfo.td
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* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-291-19/+159
* Update to LLVM 3.5a.Stephen Hines2014-04-241-285/+164
* [ARM] Handling for coprocessor instructions that are undefined starting from ...Artyom Skrobov2013-11-081-9/+14
* ARM: Add subtarget feature for CRCBernard Ogden2013-10-291-1/+3
* ARM: Mark double-precision instructions as suchTim Northover2013-10-241-0/+3
* Make ARM hint ranges consistent, and add tests for these rangesArtyom Skrobov2013-10-231-1/+10
* Add hardware division as a default feature on Cortex-A15. Also add test cases...Silviu Baranga2013-10-181-2/+2
* ARM: allow cortex-m0 to use hint instructionsTim Northover2013-10-071-0/+3
* [ARM] Warn on deprecated IT blocks in v8 AArch32 assembly.Amara Emerson2013-10-031-1/+2
* ARM: support interrupt attributeTim Northover2013-10-011-1/+8
* [ARM] Introduce the 'sevl' instruction in ARMv8.Joey Gouly2013-10-011-15/+7
* [ARM] Use the load-acquire/store-release instructions optimally in AArch32.Amara Emerson2013-09-261-125/+207
* [ARM] Split A/R class into separate subtarget features.Amara Emerson2013-09-231-3/+3
* [ARMv8] Add support for the v8 cryptography extensions.Amara Emerson2013-09-191-0/+2
* [ARMv8] Add CRC instructions.Joey Gouly2013-09-181-0/+39
* [ARMv8] Change hasV8Fp to hasFPARMv8, and other command line optionsJoey Gouly2013-09-131-2/+2
* Add an instruction deprecation feature to TableGen.Joey Gouly2013-09-121-2/+3
* [ARMv8] Implement the new DMB/DSB operands.Joey Gouly2013-09-051-4/+2
* Add AArch32 DCPS{1,2,3} and HLT instructions.Richard Barton2013-09-051-0/+10
* [ARMv8]Joey Gouly2013-08-281-3/+3
* [ARMv8] Add MC support for the new load/store acquire/release instructions.Joey Gouly2013-08-271-4/+42
* [ARMv8] Add CodeGen for VMAXNM/VMINNM.Joey Gouly2013-08-231-1/+6
* ARM: make sure ARM-mode pseudo-inst requires IsARMTim Northover2013-08-231-1/+1
* ARM: use TableGen patterns to select CMOV operations.Tim Northover2013-08-221-23/+32
* Make "mov" work for all Thumb2 MOV encodingsMihai Popa2013-08-211-0/+5
* ARMv8: SWP and SWPB are obsoleted on ARMv8.Joey Gouly2013-08-131-2/+6
* Allow generation of vmla.f32 instructions when targeting Cortex-A15. The patc...Silviu Baranga2013-07-291-1/+3
* ARM: remove now unneeded custom Asm convertersTim Northover2013-07-221-12/+0
* ARM: implement ldrex, strex and clrex intrinsicsTim Northover2013-07-161-7/+50
* ARM: Add a pack pattern for matching arithmetic shift rightArnold Schwaighofer2013-07-051-0/+3
* ARM: Fix incorrect pack patternArnold Schwaighofer2013-07-051-2/+4
* Add a V8FP instruction 'vcvt{b,t}' to convert between half and double precision.Joey Gouly2013-07-041-0/+2
* This corrects the implementation of Thumb ADR instruction. There are three i...Mihai Popa2013-07-031-1/+1
* ARM: Fix pseudo-instructions for SRS (Store Return State).Tilmann Scheller2013-06-281-4/+4
* Add a subtarget feature 'v8' to the ARM backend.Joey Gouly2013-06-261-0/+2
* ARM: fix more cases where predication may or may not be allowedTim Northover2013-06-261-2/+3
* This reverts r155000.Joey Gouly2013-06-201-6/+1
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-191-2/+2
* ARM: ISB cannot be passed the same options as DMBAmaury de la Vieuville2013-06-101-1/+11
* ARM: fix CPS decoding when ambiguous with QADDAmaury de la Vieuville2013-06-081-0/+2
* ARM sched model: Add branch instructionsArnold Schwaighofer2013-06-061-27/+35
* ARM sched model: Add preload instructionsArnold Schwaighofer2013-06-061-2/+4
* Cache the TargetLowering info object as a pointer.Bill Wendling2013-06-061-2/+2
* ARM sched model: Add more ALU and CMP instructionsArnold Schwaighofer2013-06-051-37/+49
* This is a simple patch that changes RRX and RRXS to accept all registers as o...Mihai Popa2013-06-051-1/+1
* Revert series of sched model patches until I figure out what is going on.Arnold Schwaighofer2013-06-041-88/+66
* ARM sched model: Add branch instructionsArnold Schwaighofer2013-06-041-27/+35
* ARM sched model: Add preload instructionsArnold Schwaighofer2013-06-041-2/+4
* ARM sched model: Add more ALU and CMP instructionsArnold Schwaighofer2013-06-041-37/+49
* The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction...Mihai Popa2013-05-131-5/+5