| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Update aosp/master llvm for rebase to r233350 | Pirama Arumuga Nainar | 2015-04-09 | 1 | -18/+197 |
| * | Update aosp/master LLVM for rebase to r230699. | Stephen Hines | 2015-03-23 | 1 | -10/+10 |
| * | Update aosp/master LLVM for rebase to r222494. | Stephen Hines | 2014-12-02 | 1 | -3/+25 |
| * | Update LLVM for rebase to r212749. | Stephen Hines | 2014-07-21 | 1 | -20/+145 |
| * | Update LLVM for 3.5 rebase (r209712). | Stephen Hines | 2014-05-29 | 1 | -502/+824 |
| * | Update to LLVM 3.5a. | Stephen Hines | 2014-04-24 | 1 | -36/+109 |
| * | ARM: add a couple more NEON predicates. | Tim Northover | 2013-10-24 | 1 | -4/+4 |
| * | ARM: mark various aliases with their architecture requirements. | Tim Northover | 2013-10-24 | 1 | -4/+4 |
| * | [ARMv8] Add support for the v8 cryptography extensions. | Amara Emerson | 2013-09-19 | 1 | -9/+102 |
| * | Revert "Revert "ARM: Improve pattern for isel mul of vector by scalar."" | Jim Grosbach | 2013-09-03 | 1 | -0/+11 |
| * | Revert "ARM: Improve pattern for isel mul of vector by scalar." | Michael Gottesman | 2013-08-30 | 1 | -11/+0 |
| * | ARM: Improve pattern for isel mul of vector by scalar. | Jim Grosbach | 2013-08-29 | 1 | -0/+11 |
| * | ARM: remove unused v(add|sub)hn and vqdml[as]l intrinsics. | Tim Northover | 2013-08-28 | 1 | -8/+6 |
| * | ARM: add patterns for vqdmlal with separate vqdmull and vqadds | Tim Northover | 2013-08-28 | 1 | -0/+38 |
| * | [ARMv8] Add some negative tests for the recent VFP/NEON instructions. | Joey Gouly | 2013-08-27 | 1 | -2/+2 |
| * | ARM: add natural patterns for vaddhl and vsubhl. | Tim Northover | 2013-08-27 | 1 | -0/+14 |
| * | Fix ARM vcvt encoding when the number of fractional bits is zero. | Mihai Popa | 2013-08-22 | 1 | -0/+19 |
| * | ARM: remove now unneeded custom Asm converters | Tim Northover | 2013-07-22 | 1 | -28/+0 |
| * | [ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}. | Joey Gouly | 2013-07-19 | 1 | -0/+28 |
| * | Change 'n' to 'N' to keep consistent with other instructions. | Joey Gouly | 2013-07-18 | 1 | -4/+4 |
| * | [ARMv8] Add NEON instructions VCVT{A, N, P, M}. | Joey Gouly | 2013-07-18 | 1 | -0/+35 |
| * | Remove the extra leading 0 from VMAXNMND. | Joey Gouly | 2013-07-18 | 1 | -1/+1 |
| * | [ARMv8] Add support for the NEON instructions vmaxnm/vminnm. | Joey Gouly | 2013-07-17 | 1 | -0/+45 |
| * | ARM: Add optional datatype suffix to NEON mvn asm syntax. | Jim Grosbach | 2013-06-18 | 1 | -1/+6 |
| * | ARM: Enforce decoding rules for VLDn instructions | Amaury de la Vieuville | 2013-06-11 | 1 | -40/+40 |
| * | ARM: fix VEXT encoding corner case | Tim Northover | 2013-05-31 | 1 | -5/+6 |
| * | VSTn instructions have a number of encoding constraints which are not impleme... | Mihai Popa | 2013-05-20 | 1 | -21/+21 |
| * | ARM/NEON: Pattern match vector integer abs to vabs. | Benjamin Kramer | 2013-04-26 | 1 | -0/+23 |
| * | ARM: Add VACLT and VACLE assembly aliases. | Jim Grosbach | 2013-04-15 | 1 | -0/+18 |
| * | ARM NEON: Don't need COPY_TO_REGCLASS in pattern | Arnold Schwaighofer | 2013-02-19 | 1 | -3/+1 |
| * | ARM NEON: Merge a f32 bitcast of a v2i32 extractelt | Arnold Schwaighofer | 2013-02-19 | 1 | -0/+6 |
| * | The ARM NEON vector compare instructions take three arguments. However, the | Joel Jones | 2013-02-14 | 1 | -0/+5 |
| * | Revert "Adding support for llvm.arm.neon.vaddl[su].* and" | Bob Wilson | 2012-12-20 | 1 | -40/+4 |
| * | Adding support for llvm.arm.neon.vaddl[su].* and | Renato Golin | 2012-12-20 | 1 | -4/+40 |
| * | Make sure FABS on v2f32 and v4f32 is legal on ARM NEON | Anton Korobeynikov | 2012-11-16 | 1 | -6/+9 |
| * | Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers." | Jakob Stoklund Olesen | 2012-10-26 | 1 | -15/+17 |
| * | ARM: v1i64 and v2i64 VBSL intrinsic support. | Jim Grosbach | 2012-10-15 | 1 | -0/+17 |
| * | Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808 | Evan Cheng | 2012-10-10 | 1 | -0/+8 |
| * | Add LLVM support for Swift. | Bob Wilson | 2012-09-29 | 1 | -4/+28 |
| * | ARM: Use a dedicated intrinsic for vector bitwise select. | Jim Grosbach | 2012-09-21 | 1 | -2/+29 |
| * | Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte | Evan Cheng | 2012-09-18 | 1 | -0/+33 |
| * | Use correct part of complex operand to encode VST1 alignment. | Tim Northover | 2012-09-06 | 1 | -2/+2 |
| * | Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to... | James Molloy | 2012-09-06 | 1 | -17/+15 |
| * | Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows una... | Evan Cheng | 2012-08-15 | 1 | -0/+34 |
| * | Use correct loads for vector types during extending-load operations. | Tim Northover | 2012-08-13 | 1 | -36/+36 |
| * | More replacing of target-dependent intrinsics with target-indepdent | Joel Jones | 2012-07-18 | 1 | -2/+2 |
| * | This is one of the first steps at moving to replace target-dependent | Joel Jones | 2012-07-13 | 1 | -1/+1 |
| * | ARM: Allow more flexible patterns in NEON formats. | Jim Grosbach | 2012-07-10 | 1 | -53/+53 |
| * | ARM: Add missing two-operand VBIC aliases. | Jim Grosbach | 2012-05-02 | 1 | -0/+2 |
| * | Fix the order of the operands in the llvm.fma intrinsic patterns for ARM, | Lang Hames | 2012-04-27 | 1 | -4/+4 |
