| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Fix scheduling infor for vmovn and vshrn which I broke accidentially. | Evan Cheng | 2010-10-01 | 1 | -1/+1 |
| * | NEON scheduling info fix. vmov reg, reg are single cycle instructions. | Evan Cheng | 2010-10-01 | 1 | -10/+10 |
| * | Change VLDMQ and VSTMQ to be pseudo instructions. They are expanded after | Bob Wilson | 2010-09-16 | 1 | -15/+9 |
| * | Use VLD1/VST1 pseudo instructions for loadRegFromStackSlot and | Bob Wilson | 2010-09-15 | 1 | -18/+0 |
| * | Reapply r113875 with additional cleanups. | Jim Grosbach | 2010-09-14 | 1 | -4/+5 |
| * | Make NEON ld/st pseudo instruction classes take the instruction itinerary as | Bob Wilson | 2010-09-14 | 1 | -123/+123 |
| * | Convert some VTBL and VTBX instructions to use pseudo instructions prior to | Bob Wilson | 2010-09-13 | 1 | -0/+17 |
| * | Switch all the NEON vld-lane and vst-lane instructions over to the new | Bob Wilson | 2010-09-13 | 1 | -18/+129 |
| * | Fix NEON VLD pseudo instruction itineraries that were incorrectly copied from | Bob Wilson | 2010-09-09 | 1 | -5/+5 |
| * | VFP/NEON load/store multiple instructions are addrmode4, not 5. | Jim Grosbach | 2010-09-08 | 1 | -2/+2 |
| * | Finish converting the rest of the NEON VLD instructions to use pseudo- | Bob Wilson | 2010-09-03 | 1 | -6/+34 |
| * | Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the | Bob Wilson | 2010-09-03 | 1 | -16/+111 |
| * | Convert VLD1 and VLD2 instructions to use pseudo-instructions until | Bob Wilson | 2010-09-02 | 1 | -4/+51 |
| * | Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply, | Bob Wilson | 2010-09-01 | 1 | -36/+151 |
| * | Remove NEON vmovn intrinsic, replacing it with vector truncate operations. | Bob Wilson | 2010-08-30 | 1 | -2/+28 |
| * | Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvm | Bob Wilson | 2010-08-29 | 1 | -30/+61 |
| * | Use pseudo instructions for VST1 and VST2. | Bob Wilson | 2010-08-28 | 1 | -0/+32 |
| * | We don't need to custom-select VLDMQ and VSTMQ anymore. | Bob Wilson | 2010-08-28 | 1 | -4/+6 |
| * | Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like | Bob Wilson | 2010-08-27 | 1 | -4/+4 |
| * | Use pseudo instructions for VST3. | Bob Wilson | 2010-08-26 | 1 | -3/+18 |
| * | Use pseudo instructions for VST1d64Q. | Bob Wilson | 2010-08-26 | 1 | -0/+3 |
| * | Start converting NEON load/stores to use pseudo instructions, beginning here | Bob Wilson | 2010-08-25 | 1 | -3/+28 |
| * | Replace the arm.neon.vmovls and vmovlu intrinsics with vector sign-extend and | Bob Wilson | 2010-08-20 | 1 | -18/+16 |
| * | Silence some -Asserts uninitialized variable warnings. | Daniel Dunbar | 2010-07-31 | 1 | -2/+2 |
| * | Add support for NEON VMVN immediate instructions. | Bob Wilson | 2010-07-14 | 1 | -3/+26 |
| * | The bits in the cmode field of 32-bit VMOV immediate instructions all depend | Bob Wilson | 2010-07-14 | 1 | -2/+2 |
| * | Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to represent | Bob Wilson | 2010-07-13 | 1 | -67/+51 |
| * | Also use REG_SEQUENCE for VTBX instructions. | Bob Wilson | 2010-07-07 | 1 | -9/+4 |
| * | Use REG_SEQUENCE nodes to make the table registers for VTBL instructions be | Bob Wilson | 2010-07-06 | 1 | -9/+3 |
| * | Fix indentation. | Bob Wilson | 2010-06-25 | 1 | -1/+1 |
| * | Remove a fixme comment that is no longer relevant. | Bob Wilson | 2010-06-19 | 1 | -3/+0 |
| * | Add basic support for NEON modified immediates besides VMOV. | Bob Wilson | 2010-06-15 | 1 | -8/+8 |
| * | Rename functions referring to VMOV immediates to refer to NEON "modified | Bob Wilson | 2010-06-14 | 1 | -8/+8 |
| * | Add instruction encoding for the Neon VMOV immediate instruction. This changes | Bob Wilson | 2010-06-11 | 1 | -23/+14 |
| * | Further changes for Neon vector shuffles: | Bob Wilson | 2010-06-07 | 1 | -16/+0 |
| * | Fix a few places that depended on the numeric value of subreg indices. | Jakob Stoklund Olesen | 2010-05-24 | 1 | -8/+13 |
| * | Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums | Jakob Stoklund Olesen | 2010-05-24 | 1 | -17/+17 |
| * | Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ... | Evan Cheng | 2010-05-19 | 1 | -8/+8 |
| * | vmov of immediates are trivially re-materializable. | Evan Cheng | 2010-05-17 | 1 | -0/+2 |
| * | Chris said that the comment char should be escaped. Fix all the occurences of... | Anton Korobeynikov | 2010-05-16 | 1 | -2/+2 |
| * | Added a QQQQ register file to model 4-consecutive Q registers. | Evan Cheng | 2010-05-14 | 1 | -1/+4 |
| * | Bring back VLD1q and VST1q and use them for reloading / spilling Q registers.... | Evan Cheng | 2010-05-13 | 1 | -0/+14 |
| * | Mark some pattern-less instructions as neverHasSideEffects. | Evan Cheng | 2010-05-13 | 1 | -0/+2 |
| * | Use VLD2q32 / VST2q32 to reload / spill QQ (pair of Q) registers when stack s... | Evan Cheng | 2010-05-07 | 1 | -10/+0 |
| * | Remove VLD1q and VST1q for reloading and spilling Q registers. Just use VLD1q... | Evan Cheng | 2010-05-07 | 1 | -23/+0 |
| * | Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coa... | Evan Cheng | 2010-05-06 | 1 | -0/+5 |
| * | Revert r103156 since it was breaking the build bots. | Eric Christopher | 2010-05-06 | 1 | -5/+0 |
| * | Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registe... | Evan Cheng | 2010-05-06 | 1 | -0/+5 |
| * | More fixes for itins | Anton Korobeynikov | 2010-04-07 | 1 | -24/+26 |
| * | Fix invalid itins for 32-bit varians of VMLAL and friends | Anton Korobeynikov | 2010-04-07 | 1 | -14/+14 |
