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path: root/lib/Target/ARM/ARMInstrThumb.td
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* Thumb parsing and encoding for tSTRspi.Jim Grosbach2011-08-231-0/+2
* Clean up Thumb load/store multiple definitions.Jim Grosbach2011-08-231-36/+34
* Revert r138278 now that r138289 has fixed the root issue.Jim Grosbach2011-08-221-1/+1
* Temporarilly mark tMUL as not commutable.Jim Grosbach2011-08-221-1/+1
* Clean up predicates on ARM target instruction aliases.Jim Grosbach2011-08-221-9/+6
* Thumb parsing and encoding support for NOP.Jim Grosbach2011-08-191-1/+7
* Fix NEG aliasJim Grosbach2011-08-191-1/+1
* Update tests.Jim Grosbach2011-08-191-0/+4
* Thumb assembly parsing and encoding for MUL.Jim Grosbach2011-08-191-4/+14
* Thumb assembly parsing and encoding for MOV.Jim Grosbach2011-08-191-0/+5
* Thumb assembly parsing and encoding for LSL(immediate).Jim Grosbach2011-08-191-1/+1
* Thumb assembly parsing and encoding for LDRSB and LDRSH.Jim Grosbach2011-08-191-0/+1
* Thumb assembly parsing and encoding for LDRH.Jim Grosbach2011-08-191-0/+2
* Thumb assembly parsing and encoding for LDRB.Jim Grosbach2011-08-191-0/+2
* Thumb assembly parsing and encoding for LDR(immediate) form T2.Jim Grosbach2011-08-191-0/+2
* Thumb assembly parsing and encoding for LDR(immediate) form T1.Jim Grosbach2011-08-191-0/+2
* Add explanatory comment.Jim Grosbach2011-08-191-0/+5
* Thumb assembly parsing and encoding for LDM instruction.Jim Grosbach2011-08-181-3/+8
* Thumb assembly parsing and encoding for CMP.Jim Grosbach2011-08-181-1/+1
* Thumb instructions CBZ and CBNZ are Thumb2, not THumb1.Jim Grosbach2011-08-181-25/+0
* 80 columns.Jim Grosbach2011-08-181-1/+1
* Clean up patterns for Thumb1 system instructions.Jim Grosbach2011-08-171-24/+18
* ARM clean up the imm_sr operand class representation.Jim Grosbach2011-08-171-4/+10
* Thumb assembly parsing and encoding for ADR.Jim Grosbach2011-08-171-1/+1
* Thumb ADD(immediate) parsing support.Jim Grosbach2011-08-161-3/+3
* Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch by James Molloy.Owen Anderson2011-08-151-6/+7
* Replace the existing ARM disassembler with a new one based on the FixedLenDec...Owen Anderson2011-08-091-11/+17
* Thumb1 BL instructions encoding 22 bits of displacement, not 21.Owen Anderson2011-08-081-1/+4
* Fix encodings for Thumb ASR and LSR immediate operands. They encode the rang...Owen Anderson2011-08-081-4/+12
* ARM refactoring assembly parsing of memory address operands.Jim Grosbach2011-08-031-18/+4
* Fix broken encoding of tCBNZ.Owen Anderson2011-08-031-2/+2
* Move imm0_255 to ARMInstrInfo.td with the other immediate predicates.Jim Grosbach2011-08-011-4/+0
* ARM parsing and encoding for SVC instruction.Jim Grosbach2011-07-261-1/+1
* Thumb assembly support for SETEND instruction.Jim Grosbach2011-07-221-14/+4
* Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple...Owen Anderson2011-07-181-10/+15
* Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause ...Owen Anderson2011-07-181-1/+1
* Re-apply r135319 with a fix for the constant island pass.Owen Anderson2011-07-181-41/+20
* Revert r135319 in an attempt to get to unbreak testers.Owen Anderson2011-07-161-20/+41
* Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tB...Owen Anderson2011-07-151-41/+20
* Add OperandTypes for Thumb branch targets.Benjamin Kramer2011-07-141-0/+3
* Add a target-indepedent entry to MCInstrDesc to describe the encoded size of ...Owen Anderson2011-07-131-17/+17
* Range checking for CDP[2] immediates.Jim Grosbach2011-07-131-4/+0
* Fix predicates for Thumb co-processor instructions.Jim Grosbach2011-07-131-94/+0
* Mark tBRIND as predicable.Jim Grosbach2011-07-081-2/+2
* Pseudo-ize tBRIND.Jim Grosbach2011-07-081-12/+6
* Make tBX_RET and tBX_RET_vararg predicable.Jim Grosbach2011-07-081-4/+4
* Pseudo-ize tBX_RET and tBX_RET_vararg.Jim Grosbach2011-07-081-16/+5
* Shuffle productions around a bit.Jim Grosbach2011-07-081-21/+21
* Use tPseudoExpand for tTAILJMPrND and tTAILJMPr.Jim Grosbach2011-07-081-6/+8
* Use tPseudoExpand for tTAILJMPd and tTAILJMPdND.Jim Grosbach2011-07-081-6/+6
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