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path: root/lib/Target/ARM/ARMRegisterInfo.cpp
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* Reorder includes to match coding standards. Fix an issue or two exposed by that.Craig Topper2012-03-171-1/+1
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_...David Blaikie2011-12-201-0/+2
* Trim a few unneeded includes.Jim Grosbach2011-04-181-18/+0
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a...Anton Korobeynikov2011-01-101-1/+0
* Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin2009-07-081-0/+1
* Push methods into base class in preparation for sharing.David Goodwin2009-07-081-533/+1
* Start converting to new error handling API.Torok Edwin2009-07-081-2/+2
* Start breaking out common base functionality for register info.David Goodwin2009-07-081-830/+0
* Fix a comment typo.Bob Wilson2009-07-011-1/+1
* Simplify a bitAnton Korobeynikov2009-06-271-37/+23
* ARM refactoring. Step 2: split RegisterInfoAnton Korobeynikov2009-06-271-615/+144
* For Darwin on ARMv6 and newer, make register r9 available for use as aBob Wilson2009-06-221-2/+31
* hasFP should return true if frame address is taken.Evan Cheng2009-06-221-1/+3
* Remove UseThumbBacktraces. Just check if subtarget is darwin.Evan Cheng2009-06-181-4/+3
* - Update register allocation hint after coalescing. This is done by the targe...Evan Cheng2009-06-181-63/+95
* On Darwin, frame pointer r7 is never available.Evan Cheng2009-06-151-2/+2
* Part 1.Evan Cheng2009-06-151-4/+301
* Untabification.Bill Wendling2009-05-301-1/+1
* Follow up on new support for memory operands in ARM inline assembly.Bob Wilson2009-05-191-0/+4
* Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling2009-05-131-15/+15
* PR2985 / <rdar://problem/6584986>Jim Grosbach2009-04-071-9/+36
* Fix some significant problems with constant pools that resulted in unnecessar...Evan Cheng2009-03-131-1/+1
* Propagate debug loc info through prologue/epilogue.Bill Wendling2009-02-231-4/+8
* and one more fileDale Johannesen2009-02-131-64/+92
* Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.Evan Cheng2009-02-061-0/+4
* Preliminary ARM debug support based on patch by Mikael of FlexyCore.Evan Cheng2008-12-101-2/+1
* Add a sanity-check to tablegen to catch the case where isSimpleLoadDan Gohman2008-12-031-1/+1
* Fix encoding of single-precision VFP registers.Evan Cheng2008-11-121-0/+74
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-4/+4
* Re-apply 56683 with fixes.Evan Cheng2008-09-271-1/+2
* Temporarily reverting r56683. This is causing a failure during the build of l...Bill Wendling2008-09-261-3/+1
* Fix @llvm.frameaddress codegen. FP elimination optimization should be disable...Evan Cheng2008-09-261-1/+3
* Infrastructure for getting the machine code size of a function and an instruc...Nicolas Geoffray2008-04-161-1/+1
* Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.Evan Cheng2008-03-311-30/+12
* Spiller now remove unused spill slots.Evan Cheng2008-02-271-0/+2
* Remove bunch of gcc 4.3-related warnings from TargetAnton Korobeynikov2008-02-201-1/+2
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-1/+1
* rename MachineInstr::setInstrDescriptor -> setDescChris Lattner2008-01-111-7/+7
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-2/+2
* Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner2008-01-071-2/+2
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-071-151/+45
* rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.Chris Lattner2008-01-061-2/+2
* rename isStore -> mayStore to more accurately reflect what it captures.Chris Lattner2008-01-061-1/+1
* Move some more functionality from MRegisterInfo to TargetInstrInfo.Owen Anderson2008-01-041-44/+0
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-128/+0
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-28/+0
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-11/+12
* Add new shorter predicates for testing machine operands for various types: Chris Lattner2007-12-301-2/+2
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewis...Chris Lattner2007-12-301-8/+8
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