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* Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby2012-05-171-4/+29
* Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate o...Silviu Baranga2012-05-111-1/+3
* ARM: Thumb add(sp plus register) asm constraints.Jim Grosbach2012-04-271-0/+20
* Fix ARM assembly parsing for upper case condition codes on IT instructions.Richard Barton2012-04-271-1/+1
* Refactor IT handling not to store the bottom bit of the condition code in the...Richard Barton2012-04-271-5/+2
* Unify internal representation of ARM instructions with a register right-shift...Richard Barton2012-04-251-2/+9
* Add ifdef around getSubtargetFeatureName in tablegen output file so that only...Craig Topper2012-04-251-0/+1
* ARM: improved assembler diagnostics for missing CPU features.Jim Grosbach2012-04-241-3/+16
* ARM handle :lower16: and :upper16: after a '#' prefix.Jim Grosbach2012-04-161-13/+17
* Wire up support for diagnostic ranges in the ARMAsmParser.Benjamin Kramer2012-04-151-3/+12
* ARM add missing Thumb1 two-operand aliases for shift-by-immediate.Jim Grosbach2012-04-111-0/+31
* Fix a number of problems with ARM fused multiply add/subtract instructions.Evan Cheng2012-04-111-0/+2
* ARM fix cc_out operand handling for t2SUBrr instructions.Jim Grosbach2012-04-101-2/+5
* ARM assembly aliases for add negative immediates using sub.Jim Grosbach2012-04-051-0/+38
* ARM assembly parsing for 'msr' plain 'cpsr' operand.Jim Grosbach2012-04-051-1/+2
* ARM assembler should prefer non-aliases encoding of cmp.Jim Grosbach2012-03-301-4/+6
* ARM can only use narrow encoding for low regs.Jim Grosbach2012-03-301-0/+1
* ARM integrated assembler should encoding choice for add/sub imm.Jim Grosbach2012-03-301-0/+25
* ARM assembly parsing needs to be paranoid about negative immediates.Jim Grosbach2012-03-301-3/+3
* ARM assembly 'cmp lr, #0' should not encode using 'cmn'.Jim Grosbach2012-03-291-2/+4
* Prune some includesCraig Topper2012-03-271-2/+0
* Fix assembling ARM vst2 instructions with double-spaced registers.Kevin Enderby2012-03-201-1/+1
* ARM assembly, accept optional '#' on lane index number.Jim Grosbach2012-03-191-0/+6
* ARM ldm/stm register lists can be out of order.Jim Grosbach2012-03-161-2/+6
* Remove inadvertant commit.Jim Grosbach2012-03-151-23/+0
* ARM case-insensitive checking for APSR_nzcv.Jim Grosbach2012-03-152-3/+28
* ARM aliases for pre-unified syntax fcmpz[sd] mnemonics.Jim Grosbach2012-03-151-1/+1
* ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach2012-03-061-8/+5
* ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach2012-03-061-5/+13
* ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach2012-03-051-10/+14
* ARM Remove a bit of dead code.Jim Grosbach2012-03-051-5/+0
* ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-051-0/+24
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-4/+4
* Tidy up. One more return type mismatch fix.Jim Grosbach2012-01-311-1/+1
* Keep source information, if available, around for ARM Fixups.Jim Grosbach2012-01-261-0/+1
* Tidy up. Fix mismatched return types for error handling.Jim Grosbach2012-01-261-8/+4
* ARM assemly parsing and validation of IT instruction.Jim Grosbach2012-01-251-3/+10
* NEON VLD4(all lanes) assembly parsing and encoding.Jim Grosbach2012-01-251-1/+108
* NEON VLD3(all lanes) assembly parsing and encoding.Jim Grosbach2012-01-241-0/+101
* NEON VST4(one lane) assembly parsing and encoding.Jim Grosbach2012-01-241-0/+99
* NEON VLD4(one lane) assembly parsing and encoding.Jim Grosbach2012-01-241-0/+145
* NEON VST4(multiple 4 element structures) assembly parsing.Jim Grosbach2012-01-241-0/+97
* NEON VLD4(multiple 4 element structures) assembly parsing.Jim Grosbach2012-01-241-0/+97
* Tidy up. Remove some vertical space for readability.Jim Grosbach2012-01-241-344/+121
* NEON VST3(single element from one lane) assembly parsing.Jim Grosbach2012-01-241-0/+126
* NEON VST3(multiple 3-element structures) assembly parsing.Jim Grosbach2012-01-231-20/+147
* NEON VLD3(multiple 3-element structures) assembly parsing.Jim Grosbach2012-01-231-6/+138
* NEON VLD3 lane-indexed assembly parsing and encoding.Jim Grosbach2012-01-231-0/+164
* Simplify some NEON assembly pseudo definitions.Jim Grosbach2012-01-231-263/+96
* Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction.Jim Grosbach2012-01-211-1/+3
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