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* Add a FIXME about access to negative stack-pointer offsets on PPC32.Hal Finkel2012-05-191-0/+2
* On Haswell, perfer storing YMM registers using a single instruction.Nadav Rotem2012-05-191-5/+4
* Add support for additional in-reg vbroadcast patternsNadav Rotem2012-05-191-3/+9
* Tidy up some spacing and inconsistent use of pre/post increment. No functiona...Craig Topper2012-05-192-28/+28
* Ordinary PR1255 patch: DifferenceEngine and CPPBackend adopted to the new Swi...Stepan Dyatkovskiy2012-05-191-1/+1
* Copy some AVX support from MCJIT to JIT. Maybe will fix PR12748.Craig Topper2012-05-191-17/+29
* Add support for the 'd' mips inline asm output modifier.Eric Christopher2012-05-191-12/+17
* Refactor data-in-code annotations.Jim Grosbach2012-05-184-24/+40
* Add support for the mips 'x' inline asm modifier.Eric Christopher2012-05-181-0/+5
* Simplify code a bit. No functional change intended.Craig Topper2012-05-181-14/+8
* Simplify handling of v16i8 shuffles and fix a missed optimization.Craig Topper2012-05-181-30/+8
* Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby2012-05-173-11/+54
* Remove incorrect pattern for ARM SMML instruction.Tim Northover2012-05-171-2/+1
* This patch adds the register class for MIPS16 as well as the ability forAkira Hatanaka2012-05-165-11/+26
* Hexagon: Remove unused command line option.Benjamin Kramer2012-05-161-2/+0
* Avoid creating a cycle when folding load / op with flag / store. PR11451474. ...Evan Cheng2012-05-161-0/+14
* Allow MCCodeEmitter access to the target MCRegisterInfo.Jim Grosbach2012-05-1510-0/+16
* Temporarily disable anti-dependence breaking for Mips until bug 12829 isAkira Hatanaka2012-05-151-1/+1
* Remove extraneous ';'.Bill Wendling2012-05-151-1/+1
* Add a command line option to skip the delay slot filler pass entirely for Mips.Akira Hatanaka2012-05-141-0/+10
* Fix use of uninitialized variable.David Blaikie2012-05-141-1/+1
* Revert 156634 upon request until code improvement changes are made.Brendon Cahoon2012-05-1415-3689/+339
* Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman2012-05-141-1/+1
* Hexagon: Initialize TBB to 0.Benjamin Kramer2012-05-131-0/+1
* Make sure new value jump is enabled for Hexagon V5 as well.Sirish Pande2012-05-121-10/+27
* Support for Hexagon feature, New Value Jump.Sirish Pande2012-05-127-2/+682
* Remove MipsEmitGPRestore.cpp.Akira Hatanaka2012-05-123-99/+0
* Delete all functions that are no longer needed in MipsFunctionInfo, includingAkira Hatanaka2012-05-122-15/+1
* Stop reserving register $gp. Do not call isGPFI to check whether a frame objectAkira Hatanaka2012-05-121-8/+1
* Do not add the pass which restores $gp after every function call.Akira Hatanaka2012-05-121-9/+0
* Make the following changes in MipsISelLowering.cpp:Akira Hatanaka2012-05-121-8/+8
* Make the following changes in MipsFrameLowering.cpp:Akira Hatanaka2012-05-121-32/+3
* Make the following changes in MipsAsmPrinter.cpp:Akira Hatanaka2012-05-123-31/+11
* Insert instructions to the entry basic block which initializes the globalAkira Hatanaka2012-05-121-35/+52
* Do not replace operands of pseudo instructions with register $zero.Akira Hatanaka2012-05-111-1/+2
* [fast-isel] Add support for selecting @llvm.trap().Chad Rosier2012-05-111-0/+4
* Updated instruction table due to addded intrinsics.Brendon Cahoon2012-05-111-1880/+1943
* Remove warnings from HexagonVLIWPacketizer.Sirish Pande2012-05-111-3/+3
* Hexagon constant extender support.Brendon Cahoon2012-05-1115-339/+3626
* Typo.Chad Rosier2012-05-111-1/+1
* [fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Min...Chad Rosier2012-05-111-12/+2
* Hexagon V5 intrinsics support.Sirish Pande2012-05-113-615/+1061
* [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier2012-05-111-4/+21
* [fast-isel] Rather then assert (or segfault in a non-asserts build), fall backChad Rosier2012-05-111-2/+4
* The return type is an unsigned, not a bool.Chad Rosier2012-05-111-1/+1
* Add space before an open parenthesis in control flow statements.Manman Ren2012-05-111-2/+2
* Added X86 Atom latencies to X86InstrMMX.td.Preston Gurd2012-05-114-130/+350
* Implement initial-exec TLS model for 32-bit PIC x86Hans Wennborg2012-05-114-16/+35
* Added the missing bit definition for the 4th bit of the STR (post reg) instru...Silviu Baranga2012-05-112-0/+5
* Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate o...Silviu Baranga2012-05-112-3/+9
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