| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | This corrects creation of operands for t2PLDW. It also removes the definition... | Mihai Popa | 2013-08-06 | 1 | -0/+2 |
| * | [ARMv8] Add support for the NEON instructions vmaxnm/vminnm. | Joey Gouly | 2013-07-17 | 1 | -0/+18 |
| * | Remove an unneeded call to 'UpdateThumbVFPPredicate', spotted by Amaury. | Joey Gouly | 2013-07-04 | 1 | -1/+0 |
| * | Add support for MC assembling and disassembling of vsel{ge, gt, eq, vs} instr... | Joey Gouly | 2013-07-04 | 1 | -0/+15 |
| * | ARM: check predicate bits for thumb instructions | Amaury de la Vieuville | 2013-06-24 | 1 | -13/+17 |
| * | ARM: rGPR is meant to be unpredictable, not undefined | Amaury de la Vieuville | 2013-06-24 | 1 | -2/+5 |
| * | ARM: fix IT decoding | Amaury de la Vieuville | 2013-06-24 | 1 | -4/+2 |
| * | ARM: enable decoding of pc-relative PLD/PLI | Amaury de la Vieuville | 2013-06-24 | 1 | -36/+115 |
| * | ARM: fix thumb literal loads decoding | Amaury de la Vieuville | 2013-06-18 | 1 | -18/+205 |
| * | ARM: thumb stores cannot use PC as dest register | Amaury de la Vieuville | 2013-06-18 | 1 | -0/+37 |
| * | ARM: fix B decoding | Amaury de la Vieuville | 2013-06-13 | 1 | -1/+1 |
| * | ARM: Enforce decoding rules for VLDn instructions | Amaury de la Vieuville | 2013-06-11 | 1 | -28/+36 |
| * | ARM: Fix STREX/LDREX reecoding | Amaury de la Vieuville | 2013-06-11 | 1 | -10/+28 |
| * | ARM: ISB cannot be passed the same options as DMB | Amaury de la Vieuville | 2013-06-10 | 1 | -0/+11 |
| * | ARM: fix VMOVvnf32 decoding when ambiguous with VCVT | Amaury de la Vieuville | 2013-06-08 | 1 | -0/+4 |
| * | ARM: enforce SRS decoding constraints | Amaury de la Vieuville | 2013-06-08 | 1 | -1/+7 |
| * | ARM: fix CPS decoding when ambiguous with QADD | Amaury de la Vieuville | 2013-06-08 | 1 | -0/+32 |
| * | ARM: fix VCVT decoding | Amaury de la Vieuville | 2013-06-08 | 1 | -2/+2 |
| * | ARM: add fstmx and fldmx instructions for assembly | Tim Northover | 2013-05-31 | 1 | -2/+15 |
| * | Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. | Michael J. Spencer | 2013-05-24 | 1 | -1/+1 |
| * | Remove the Copied parameter from MemoryObject::readBytes. | Benjamin Kramer | 2013-05-24 | 1 | -3/+3 |
| * | Add MCSymbolizer for symbolic/annotated disassembly. | Ahmed Bougacha | 2013-05-24 | 1 | -107/+4 |
| * | VSTn instructions have a number of encoding constraints which are not impleme... | Mihai Popa | 2013-05-20 | 1 | -0/+51 |
| * | Q registers are encoded in fields of the same length as D registers. As Q reg... | Mihai Popa | 2013-05-20 | 1 | -1/+1 |
| * | Replace some bit operations with simpler ones. No functionality change. | Benjamin Kramer | 2013-05-19 | 1 | -1/+1 |
| * | The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction... | Mihai Popa | 2013-05-13 | 1 | -0/+18 |
| * | ARM: Fix encoding of hint instruction for Thumb. | Quentin Colombet | 2013-04-26 | 1 | -4/+6 |
| * | ARM: Permit "sp" in ARM variant of STREXD instructions | Tim Northover | 2013-04-19 | 1 | -1/+1 |
| * | ARM: permit "sp" in ARM variants of MOVW/MOVT instructions | Tim Northover | 2013-04-19 | 1 | -2/+3 |
| * | Fix treatment of ARM unallocated hint instructions. | Quentin Colombet | 2013-04-17 | 1 | -0/+11 |
| * | Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when th... | Gordon Keiser | 2013-03-28 | 1 | -2/+2 |
| * | Patch by Gordon Keiser! | Joe Abbey | 2013-03-26 | 1 | -1/+1 |
| * | Remove edis - the enhanced disassembler. Fixes PR14654. | Roman Divacky | 2012-12-19 | 1 | -16/+0 |
| * | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 2012-12-03 | 1 | -6/+6 |
| * | Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInst | Kevin Enderby | 2012-11-29 | 1 | -1/+7 |
| * | Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch target | Kevin Enderby | 2012-10-29 | 1 | -9/+21 |
| * | Fix a bug where a 32-bit address with the high bit does not get symbolicated | Kevin Enderby | 2012-10-18 | 1 | -2/+3 |
| * | Fix the handling of edge cases in ARM shifted operands. | Tim Northover | 2012-09-22 | 1 | -0/+5 |
| * | Diagnose invalid alignments on duplicating VLDn instructions. | Tim Northover | 2012-09-06 | 1 | -0/+4 |
| * | Check for invalid alignment values when decoding VLDn/VSTn (single ln) instru... | Tim Northover | 2012-09-06 | 1 | -8/+38 |
| * | Fix integer undefined behavior due to signed left shift overflow in LLVM. | Richard Smith | 2012-08-24 | 1 | -1/+1 |
| * | Remove unnecessary include of ARMGenInstrInfo.inc. | Craig Topper | 2012-08-17 | 1 | -1/+0 |
| * | Switch the fixed-length disassembler to be table-driven. | Jim Grosbach | 2012-08-14 | 1 | -411/+425 |
| * | Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ... | Jiangning Liu | 2012-08-02 | 1 | -3/+8 |
| * | Fix #13138, a bug around ARM instruction DSB encoding and decoding issue. | Jiangning Liu | 2012-08-02 | 1 | -12/+1 |
| * | Fix a typo (the the => the) | Sylvestre Ledru | 2012-07-23 | 1 | -1/+1 |
| * | Fix instruction description of VMOV (between two ARM core registers and two s... | Richard Barton | 2012-07-10 | 1 | -4/+4 |
| * | Revert r159938 (and r159945) to appease the buildbots. | Chad Rosier | 2012-07-09 | 1 | -4/+4 |
| * | Oops - correct broken disassembly for VMOV | Richard Barton | 2012-07-09 | 1 | -1/+1 |
| * | Fix instruction description of VMOV (between two ARM core registers and two s... | Richard Barton | 2012-07-09 | 1 | -4/+4 |
