| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | ARM PKH shift ammount operand printing tweaks. | Jim Grosbach | 2011-07-20 | 2 | -12/+8 |
| * | ARM: Tidy up representation of PKH instruction. | Jim Grosbach | 2011-07-20 | 2 | -2/+10 |
| * | Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple... | Owen Anderson | 2011-07-18 | 1 | -2/+2 |
| * | Re-apply r135319 with a fix for the constant island pass. | Owen Anderson | 2011-07-18 | 1 | -7/+7 |
| * | Revert r135319 in an attempt to get to unbreak testers. | Owen Anderson | 2011-07-16 | 1 | -7/+7 |
| * | Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tB... | Owen Anderson | 2011-07-15 | 1 | -7/+7 |
| * | Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues ... | Owen Anderson | 2011-07-15 | 1 | -5/+0 |
| * | Eliminate "const" from extern const to fix breakeage since r135184 on msvc. | NAKAMURA Takumi | 2011-07-15 | 1 | -1/+1 |
| * | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng | 2011-07-14 | 1 | -3/+4 |
| * | ARM ISB instruction assembly parsing. | Jim Grosbach | 2011-07-14 | 1 | -1/+1 |
| * | Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc | Evan Cheng | 2011-06-28 | 1 | -0/+1 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 2 | -122/+122 |
| * | Restore an accidentally removed comment. | Cameron Zwarich | 2011-05-25 | 1 | -0/+1 |
| * | Change the order of tBX's operands so that the predicate operands come after the | Cameron Zwarich | 2011-05-25 | 1 | -1/+10 |
| * | Rename tBX_Rm to tBX. | Cameron Zwarich | 2011-05-25 | 1 | -2/+2 |
| * | Fix Bug 9386 - ARM disassembler failed to disassemble conditional bx | Johnny Chen | 2011-05-22 | 1 | -3/+4 |
| * | Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immedi... | Johnny Chen | 2011-05-18 | 1 | -1/+1 |
| * | Fix a bug in the case that there is no add or subtract symbol and the offset | Kevin Enderby | 2011-04-27 | 1 | -2/+6 |
| * | Fix typo in the comment. | Johnny Chen | 2011-04-19 | 1 | -1/+1 |
| * | Thumb2 BFC was insufficiently encoded. | Johnny Chen | 2011-04-15 | 1 | -1/+1 |
| * | A8.6.315 VLD3 (single 3-element structure to all lanes) | Johnny Chen | 2011-04-15 | 1 | -0/+6 |
| * | The ARM disassembler did not handle the alignment correctly for VLD*DUP* inst... | Johnny Chen | 2011-04-15 | 1 | -0/+27 |
| * | Add sanity checkings for Thumb2 Load/Store Register Exclusive family of opera... | Johnny Chen | 2011-04-14 | 1 | -4/+41 |
| * | Thumb disassembler did not handle tBRIND (indirect branch) properly. | Johnny Chen | 2011-04-13 | 1 | -6/+10 |
| * | Check for unallocated instruction encodings when disassembling Thumb Branch i... | Johnny Chen | 2011-04-13 | 1 | -5/+11 |
| * | The LDR*T/STR*T (unpriviledged load/store) operations don't take SP or PC as Rt. | Johnny Chen | 2011-04-13 | 1 | -6/+14 |
| * | Check the corner cases for t2LDRSHi12 correctly and mark invalid encodings as... | Johnny Chen | 2011-04-13 | 1 | -1/+33 |
| * | Fix a bug where for t2MOVCCi disassembly, the TIED_TO register operand was no... | Johnny Chen | 2011-04-13 | 1 | -3/+11 |
| * | Add sanity check for Ld/St Dual forms of Thumb2 instructions. | Johnny Chen | 2011-04-12 | 1 | -0/+29 |
| * | The Thumb2 RFE instructions need to have their second halfword fully specified. | Johnny Chen | 2011-04-12 | 1 | -2/+6 |
| * | Add bad register checks for Thumb2 Ld/St instructions. | Johnny Chen | 2011-04-12 | 1 | -0/+45 |
| * | The Thumb2 Ld, St, and Preload instructions with the i12 forms should have it... | Johnny Chen | 2011-04-12 | 1 | -0/+2 |
| * | Print out a debug message when the reglist fails the sanity check for Thumb L... | Johnny Chen | 2011-04-12 | 2 | -0/+29 |
| * | A8.6.16 B | Johnny Chen | 2011-04-12 | 1 | -0/+5 |
| * | Thumb disassembler was erroneously rejecting "blx sp" instruction. | Johnny Chen | 2011-04-11 | 1 | -2/+5 |
| * | Fix the bug where the immediate shift amount for Thumb logical shift instruct... | Johnny Chen | 2011-04-11 | 1 | -6/+17 |
| * | Trivial comment fix. | Johnny Chen | 2011-04-11 | 2 | -2/+2 |
| * | Check invalid register encodings for LdFrm/StFrm ARM instructions and flag th... | Johnny Chen | 2011-04-11 | 1 | -0/+68 |
| * | Adding support for printing operands symbolically to llvm's public 'C' | Kevin Enderby | 2011-04-11 | 4 | -6/+139 |
| * | Fix an apparent typo that made GCC complain | Matt Beaumont-Gay | 2011-04-08 | 1 | -1/+1 |
| * | Check opcoe (dmb, dsb) instead of bitfields matching. | Johnny Chen | 2011-04-08 | 1 | -12/+1 |
| * | Hanlde the checking of bad regs for SMMLAR properly, instead of asserting. | Johnny Chen | 2011-04-08 | 1 | -9/+10 |
| * | Sanity check the option operand for DMB/DSB. | Johnny Chen | 2011-04-08 | 2 | -8/+29 |
| * | Add sanity checking for bad register specifier(s) for the DPFrm instructions. | Johnny Chen | 2011-04-08 | 1 | -0/+30 |
| * | Add sanity checking for invalid register encodings for signed/unsigned extend... | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| * | Add sanity checking for invalid register encodings for saturating instructions. | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| * | Add some more comments about checkings of invalid register numbers. | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| * | Sanity check MSRi for invalid mask values and reject it as invalid. | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| * | The ARM disassembler was not recognizing USADA8 instruction. Need to add che... | Johnny Chen | 2011-04-07 | 1 | -3/+5 |
| * | Should also check SMLAD for invalid register values. | Johnny Chen | 2011-04-07 | 1 | -6/+12 |
