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path: root/lib/Target/ARM/Thumb1InstrInfo.cpp
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* Update aosp/master llvm for rebase to r233350Pirama Arumuga Nainar2015-04-091-2/+1
* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-1/+1
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-2/+32
* Update to LLVM 3.5a.Stephen Hines2014-04-241-1/+0
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-1/+1
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-1/+1
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-201-4/+4
* Prune some includesCraig Topper2012-03-271-1/+0
* Reorder includes to match coding standards. Fix an issue or two exposed by that.Craig Topper2012-03-171-1/+0
* ARM implement TargetInstrInfo::getNoopForMachoTarget()Jim Grosbach2012-02-281-1/+10
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Make use of MachinePointerInfo::getFixedStack. This removes all mentionJay Foad2011-11-151-5/+2
* Refact ARM Thumb1 tMOVr instruction family.Jim Grosbach2011-06-301-11/+1
* Thumb1 register to register MOV instruction is predicable.Jim Grosbach2011-06-301-2/+2
* Refactor away tSpill and tRestore pseudos in ARM backend.Jim Grosbach2011-06-291-2/+2
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-281-1/+0
* Move callee-saved regs spills / reloads to TFIAnton Korobeynikov2010-11-271-74/+0
* convert targets to the new MF.getMachineMemOperand interface.Chris Lattner2010-09-211-4/+6
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-111-76/+0
* Replace copyRegToReg with copyPhysReg for ARM.Jakob Stoklund Olesen2010-07-111-24/+17
* Thumb1 functions using @llvm.returnaddress were not saving the incoming LR.Bob Wilson2010-06-221-3/+3
* Next round of tail call changes. Register used in a tailDale Johannesen2010-06-151-3/+3
* Implement @llvm.returnaddress. rdar://8015977.Evan Cheng2010-05-221-5/+21
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-4/+2
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-8/+10
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-4/+4
* Don't leak a MachineInstruction from Thumb1InstrInfo::restoreCalleeSavedRegis...Jeffrey Yasskin2010-03-221-0/+2
* Change ARM ld/st multiple instructions to have variant instructions forBob Wilson2010-03-131-2/+0
* Update Thumb1 storeRegToStackSlot() and loadRegFromStackSlot() to properlyJim Grosbach2010-01-151-2/+6
* Silence a clang warning about the deprecated (but perfectly reasonable inJohn McCall2009-12-161-2/+2
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-051-19/+0
* Refactor code.Evan Cheng2009-11-081-55/+0
* 80-column cleanup of file header commentsJim Grosbach2009-11-071-1/+1
* t2ldrpci_pic can be used for blockaddress as well.Evan Cheng2009-11-071-3/+14
* - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relativeEvan Cheng2009-11-061-1/+45
* Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,...Anton Korobeynikov2009-11-021-1/+2
* Fix a couple more places where we are creating ld / st instructions without m...Evan Cheng2009-11-011-2/+18
* Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate theBob Wilson2009-10-281-0/+1
* Forgot about ARM::tPUSH. It also has a new writeback operand.Evan Cheng2009-10-021-0/+1
* ARM::tPOP and tPOP_RET each has an extra writeback operand now.Evan Cheng2009-10-011-0/+1
* It's ok to spill a tGPR register as long as it's still allocated a low register.Evan Cheng2009-08-131-6/+14
* Shrinkify Thumb2 load / store multiple instructions.Evan Cheng2009-08-111-5/+11
* Move the getInlineAsmLength virtual method from TAI to TII, whereChris Lattner2009-08-021-2/+1
* - More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng2009-07-281-12/+0
* More DCE.Evan Cheng2009-07-271-4/+0
* Get rid of more dead code.Evan Cheng2009-07-271-2/+0
* Get rid of some more getOpcode calls.Evan Cheng2009-07-271-3/+0
* Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m...Evan Cheng2009-07-271-2/+0
* Merge isLoadFromStackSlot into one since it behaves the same regardless of su...Evan Cheng2009-07-271-32/+0
* Just use a single isMoveInstr to catch all the cases.Evan Cheng2009-07-271-23/+0