| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Update aosp/master llvm for rebase to r233350 | Pirama Arumuga Nainar | 2015-04-09 | 1 | -2/+1 |
| * | Update aosp/master LLVM for rebase to r230699. | Stephen Hines | 2015-03-23 | 1 | -6/+3 |
| * | Update aosp/master LLVM for rebase to r222494. | Stephen Hines | 2014-12-02 | 1 | -0/+9 |
| * | Update to LLVM 3.5a. | Stephen Hines | 2014-04-24 | 1 | -1/+0 |
| * | ARM: remove unnecessary state-tracking during frame lowering. | Tim Northover | 2013-11-04 | 1 | -0/+7 |
| * | Add hint disassembly syntax for 16-bit Thumb hint instructions. | Richard Barton | 2013-10-18 | 1 | -1/+2 |
| * | Fix PR 17372: Emitting PLD for stack address for ARM Thumb2 | Weiming Zhao | 2013-09-26 | 1 | -0/+7 |
| * | Reverting 190043 for now. | Tilmann Scheller | 2013-09-05 | 1 | -14/+2 |
| * | ARM: Add GPR register class excluding LR for use with the ADR instruction. | Tilmann Scheller | 2013-09-05 | 1 | -2/+14 |
| * | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 1 | -1/+1 |
| * | Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. | Michael J. Spencer | 2013-05-24 | 1 | -3/+3 |
| * | ARM: Use ldrd/strd to spill 64-bit pairs when available. | Tim Northover | 2013-04-21 | 1 | -20/+64 |
| * | Remove the explicit MachineInstrBuilder(MI) constructor. | Jakob Stoklund Olesen | 2012-12-19 | 1 | -1/+1 |
| * | Remove all references to TargetInstrInfoImpl. | Jakob Stoklund Olesen | 2012-11-28 | 1 | -2/+2 |
| * | Remove the TII::scheduleTwoAddrSource() hook. | Jakob Stoklund Olesen | 2012-08-13 | 1 | -42/+0 |
| * | Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s... | Craig Topper | 2012-04-20 | 1 | -6/+6 |
| * | Prune some includes | Craig Topper | 2012-03-27 | 1 | -1/+0 |
| * | Remove unnecessary llvm:: qualifications | Craig Topper | 2012-03-27 | 1 | -5/+5 |
| * | Reorder includes to match coding standards. Fix an issue or two exposed by that. | Craig Topper | 2012-03-17 | 1 | -1/+0 |
| * | ARM implement TargetInstrInfo::getNoopForMachoTarget() | Jim Grosbach | 2012-02-28 | 1 | -0/+8 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Handle regmask operands in ARMInstrInfo. | Jakob Stoklund Olesen | 2012-02-17 | 1 | -1/+1 |
| * | Make use of MachinePointerInfo::getFixedStack. This removes all mention | Jay Foad | 2011-11-15 | 1 | -5/+2 |
| * | Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode. | Jim Grosbach | 2011-08-24 | 1 | -3/+2 |
| * | Handle new register classes in Thumb2 mode. Should fix the ARM buildbots. | Owen Anderson | 2011-08-11 | 1 | -2/+4 |
| * | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 2011-07-20 | 1 | -1/+1 |
| * | Refact ARM Thumb1 tMOVr instruction family. | Jim Grosbach | 2011-06-30 | 1 | -15/+4 |
| * | Thumb1 register to register MOV instruction is predicable. | Jim Grosbach | 2011-06-30 | 1 | -7/+7 |
| * | Kill dead code. | Jim Grosbach | 2011-06-30 | 1 | -1/+0 |
| * | Remove redundant Thumb2 ADD/SUB SP instruction definitions. | Jim Grosbach | 2011-06-29 | 1 | -6/+4 |
| * | Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc | Evan Cheng | 2011-06-28 | 1 | -1/+0 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -1/+1 |
| * | Preliminary support for ARM frame save directives emission via MI flags. | Anton Korobeynikov | 2011-03-05 | 1 | -8/+11 |
| * | Guard against de-referencing MBB.end(). | Evan Cheng | 2011-02-22 | 1 | -1/+4 |
| * | Skipping over debugvalue instructions to determine whether the split spot is ... | Evan Cheng | 2011-02-21 | 1 | -0/+3 |
| * | Making use of VFP / NEON floating point multiply-accumulate / subtraction is | Evan Cheng | 2010-12-05 | 1 | -6/+0 |
| * | Two sets of changes. Sorry they are intermingled. | Evan Cheng | 2010-11-03 | 1 | -27/+0 |
| * | Thread the determination of branch prediction hit rates back through the if-c... | Owen Anderson | 2010-10-01 | 1 | -4/+7 |
| * | Provide an option to restore old-style if-conversion heuristics for Thumb2. | Owen Anderson | 2010-10-01 | 1 | -0/+29 |
| * | Part one of switching to using a more sane heuristic for determining if-conve... | Owen Anderson | 2010-09-28 | 1 | -25/+0 |
| * | convert targets to the new MF.getMachineMemOperand interface. | Chris Lattner | 2010-09-21 | 1 | -4/+6 |
| * | Teach if-converter to be more careful with predicating instructions that would | Evan Cheng | 2010-09-10 | 1 | -1/+1 |
| * | Many Thumb2 instructions can reference the full ARM register set (i.e., | Jim Grosbach | 2010-07-30 | 1 | -4/+4 |
| * | Replace copyRegToReg with copyPhysReg for ARM. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -27/+19 |
| * | The t2MOVi16 and t2MOVTi16 instructions do not set CPSR. Trying to add | Bob Wilson | 2010-06-29 | 1 | -2/+2 |
| * | Change if-cvt options to something that actually as useable. | Evan Cheng | 2010-06-29 | 1 | -4/+6 |
| * | Change if-conversion block size limit checks to add some flexibility. | Evan Cheng | 2010-06-25 | 1 | -0/+23 |
| * | Tail merging pass shall not break up IT blocks. rdar://8115404 | Evan Cheng | 2010-06-22 | 1 | -0/+16 |
| * | Allow ARM if-converter to be run after post allocation scheduling. | Evan Cheng | 2010-06-18 | 1 | -1/+58 |
| * | Next round of tail call changes. Register used in a tail | Dale Johannesen | 2010-06-15 | 1 | -5/+7 |
