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* Remove unnecessary scope resolution operator.Jim Grosbach2011-09-131-3/+2
* Correct disassembly printing of Thumb2 post-incremented LDRD and STRD.Owen Anderson2011-09-132-6/+9
* There's only 16 regs legal in a register list.Jim Grosbach2011-09-131-1/+1
* Tidy up a few 80 column violations.Jim Grosbach2011-09-135-17/+17
* Tidy up a bit.Jim Grosbach2011-09-131-152/+78
* Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it ...Owen Anderson2011-09-131-1/+4
* Fix encoding of Thumb2 shifted register operands with RRX shifts.Owen Anderson2011-09-131-0/+1
* Zap some junk from the ARM instruction descriptions.Eli Friedman2011-09-134-67/+0
* Tidy up a bit.Jim Grosbach2011-09-121-18/+9
* Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP ...Owen Anderson2011-09-121-7/+88
* Fix encoding of PC-relative LDRSHW with an immediate offset.Owen Anderson2011-09-121-10/+19
* There's no need to add additional predicate operands when converting a tB to ...Owen Anderson2011-09-121-2/+0
* Port more encoding tests to decoding tests, and correct an improper Thumb2 pr...Owen Anderson2011-09-122-0/+36
* Thumb2 parsing and encoding for MOV(immediate).Jim Grosbach2011-09-102-4/+58
* LDM writeback is not allowed if Rn is in the target register list.Owen Anderson2011-09-091-0/+19
* Fix an ambiguously nested if.Owen Anderson2011-09-091-2/+2
* Fix buildbot breakage caused by r139415. I missed one instance of a manually...Owen Anderson2011-09-091-1/+5
* Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands.Owen Anderson2011-09-093-2/+27
* Thumb unconditional branches are allowed in IT blocks, and therefore should h...Owen Anderson2011-09-099-23/+70
* Thumb2 assembly parsing and encoding for MLA and MLS.Jim Grosbach2011-09-091-2/+2
* Thumb2 assembly parsing and encoding for LDRSB.Jim Grosbach2011-09-091-1/+11
* Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.Jim Grosbach2011-09-098-40/+125
* All conditional branches are disallowed in IT blocks, not just CBZ/CBNZ.Owen Anderson2011-09-081-2/+3
* Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block.Owen Anderson2011-09-081-12/+21
* Thumb2 assembly parsing and encoding for LDRD(immediate).Jim Grosbach2011-09-086-25/+226
* Thumb2 assembly parsing and encoding for LDR post-indexed.Jim Grosbach2011-09-082-27/+27
* Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback.Jim Grosbach2011-09-083-59/+112
* Remove the "common" set of instructions shared between ARM and Thumb2 modes. ...Owen Anderson2011-09-082-20/+0
* Thumb2 assembly parsing and encoding for LDRBT.Jim Grosbach2011-09-072-13/+30
* Thumb2 assembly parsing and encoding for LDR(register).Jim Grosbach2011-09-072-1/+25
* Thumb2 assembly parsing and encoding for LDRB(immediate).Jim Grosbach2011-09-071-3/+7
* Create Thumb2 versions of STC/LDC, and reenable the relevant tests.Owen Anderson2011-09-072-0/+132
* Thumb2 parsing and encoding for LDR(immediate).Jim Grosbach2011-09-072-42/+96
* Thumb2 parsing and encoding for LDMDB.Jim Grosbach2011-09-071-0/+1
* Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds p...James Molloy2011-09-071-16/+23
* Thumb2 ldm/stm 'db' mnemonics don't have a '.w' suffix.Jim Grosbach2011-09-071-2/+2
* Thumb2 parsing and encoding for LDMIA.Jim Grosbach2011-09-071-3/+51
* Port more assembler tests over to disassembler tests, and fix a minor logic e...Owen Anderson2011-09-071-1/+1
* Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= ...James Molloy2011-09-074-12/+22
* Thumb2 use 'ldm' as default mnemonic.Jim Grosbach2011-09-071-2/+2
* Better diagnostic location information for mnemonic suffices.Jim Grosbach2011-09-071-2/+4
* ISB is HasDB, not just HasV7.Jim Grosbach2011-09-061-1/+1
* Thumb2 parsing and encoding for ISB.Jim Grosbach2011-09-061-8/+7
* Thumb2 parsing and encoding for DMB.Jim Grosbach2011-09-061-0/+4
* Thumb2 parsing and encoding for DBG.Jim Grosbach2011-09-061-6/+4
* Thumb2 parsing and encoding for CMN and CMP.Jim Grosbach2011-09-061-21/+44
* Add mayLoad/mayStore markings to ARM 64-bit atomic pseudo-instructions.Eli Friedman2011-09-061-1/+1
* Thumb2 parsing and encoding for CLREX.Jim Grosbach2011-09-062-5/+3
* Add codegen support for vector select (in the IR this means a selectDuncan Sands2011-09-062-5/+15
* Fix fall outs from my recent change on how carry bit is modeled during isel.Evan Cheng2011-09-063-33/+36