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* ARM: Use MCTargetAsmParser::validateTargetOperandClass().Jim Grosbach2013-02-061-47/+19
* Move MRI liveouts to ARM return instructions.Jakob Stoklund Olesen2013-02-053-18/+22
* ARM cost model: Cost for scalar integer casts and floating point conversionsArnold Schwaighofer2013-02-051-7/+108
* ARM cost model: Penalize insertelement into D subregistersArnold Schwaighofer2013-02-041-0/+13
* Switch the code added in r173885 to use the new, shiny RTTIChandler Carruth2013-01-312-9/+5
* Give the MCStreamer class hierarchy LLVM RTTI facilities for use withChandler Carruth2013-01-311-6/+9
* [PEI] Pass the frame index operand number to the eliminateFrameIndex function.Chad Rosier2013-01-314-32/+25
* Add AArch64 as an experimental target.Tim Northover2013-01-311-0/+3
* Add a special ARM trap encoding for NaCl.Eli Bendersky2013-01-308-6/+66
* Add missing header and test cases for r173939.Logan Chien2013-01-301-0/+112
* Override virtual function for ARM EH directives.Logan Chien2013-01-301-2/+216
* This patch implements runtime ARM specificJack Carter2013-01-302-0/+21
* This patch reworks how llvm targets set Jack Carter2013-01-301-6/+0
* Adding simple cast cost to ARMRenato Golin2013-01-292-2/+46
* Fix 64-bit atomic operations in Thumb mode.Tim Northover2013-01-291-74/+46
* Teach SDISel to combine fsin / fcos into a fsincos node if the followingEvan Cheng2013-01-291-0/+2
* Fixed the condition codes for the atomic64 min/umin code generation on ARM. I...Silviu Baranga2013-01-251-2/+2
* Follow up of commit r172472.Quentin Colombet2013-01-141-28/+15
* Complete the existing support of ARM v6m, v7m, and v7em, i.e., respectively c...Quentin Colombet2013-01-141-0/+9
* Fix description of ARMOperandJoel Jones2013-01-091-1/+1
* ARM Cost model: Use the size of vector registers and widest vectorizable inst...Nadav Rotem2013-01-091-0/+10
* Last in the series of removing unnecessary '0' arguments forEric Christopher2013-01-092-6/+6
* MIsched: add an ILP window property to machine model.Andrew Trick2013-01-091-0/+3
* These functions have default arguments of 0 for the last arg. UseEric Christopher2013-01-091-2/+2
* Cost Model: Move the 'max unroll factor' variable to the TTI and add initial ...Nadav Rotem2013-01-091-0/+25
* Renamed MCInstFragment to MCRelaxableFragment and added some comments.Eli Bendersky2013-01-081-2/+2
* ARM: Copy-paste error.Jim Grosbach2013-01-071-1/+1
* ARM: Fix a few copy-paste errors.Jim Grosbach2013-01-072-3/+3
* Change SMRange to be half-open (exclusive end) instead of closed (inclusive)Jordan Rose2013-01-071-82/+90
* Add LICENSE.TXT covering contributions made by ARM.Tim Northover2013-01-071-0/+47
* Move TargetTransformInfo to live under the Analysis library. This noChandler Carruth2013-01-071-1/+1
* Switch TargetTransformInfo from an immutable analysis pass that requiresChandler Carruth2013-01-077-64/+142
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-0222-63/+63
* Resort the #include lines in include/... and lib/... with theChandler Carruth2013-01-022-2/+2
* Remove the Function::getRetAttributes method in favor of using the AttributeS...Bill Wendling2012-12-301-2/+1
* Remove the Function::getFnAttributes method in favor of using the AttributeSetBill Wendling2012-12-305-12/+19
* Use a std::string rather than a dynamically allocated char* buffer.Benjamin Kramer2012-12-242-21/+6
* Cleanup compiler warnings on discarding type qualifiers in casts. Switch to C...Benjamin Kramer2012-12-212-6/+10
* Remove duplicate includes.Roman Divacky2012-12-213-3/+0
* Add ARM cortex-r5 subtarget.Quentin Colombet2012-12-212-1/+13
* Add an MF argument to MI::copyImplicitOps().Jakob Stoklund Olesen2012-12-203-4/+4
* MachineInstrBuilderize ARM.Jakob Stoklund Olesen2012-12-201-3/+4
* Revert "Adding support for llvm.arm.neon.vaddl[su].* and"Bob Wilson2012-12-203-66/+4
* On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr,Evan Cheng2012-12-204-77/+103
* Remove MCTargetAsmLexer and its derived classes now that edis,Roman Divacky2012-12-203-138/+0
* Adding support for llvm.arm.neon.vaddl[su].* andRenato Golin2012-12-203-4/+66
* MC: Add MCInstrDesc::mayAffectControlFlow() method.Jim Grosbach2012-12-192-2/+2
* Remove the explicit MachineInstrBuilder(MI) constructor.Jakob Stoklund Olesen2012-12-194-11/+9
* LLVM sdisel normalize bit extraction of the form:Evan Cheng2012-12-191-2/+107
* Remove edis - the enhanced disassembler. Fixes PR14654.Roman Divacky2012-12-193-18/+1