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* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S...Sylvestre Ledru2012-09-275-10/+10
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-275-10/+10
* [arm-fast-isel] Add support for ELF PIC.Jush Lu2012-09-275-2/+123
* Remove the `hasFnAttr' method from Function.Bill Wendling2012-09-264-5/+5
* Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.James Molloy2012-09-261-2/+2
* ARM: Darwin BL/BLX relocations to out-of-range symbols.Jim Grosbach2012-09-251-1/+48
* ARM: 'add Rd, pc, #imm' is an alias for 'adr Rd, #imm'.Jim Grosbach2012-09-251-0/+14
* Rather then have a wrapper function, have tblgen instantiate the implementation.Chad Rosier2012-09-241-6/+0
* Rather then have a wrapper function, have tblgen instantiate the implementation.Chad Rosier2012-09-241-4/+0
* ARMInstPrinter.cpp: Fix a warning in -Asserts. [-Wunused-variable]NAKAMURA Takumi2012-09-221-0/+2
* Whitespace.NAKAMURA Takumi2012-09-221-2/+2
* Fix edge cases of ARM shift operands in arith instructions.Tim Northover2012-09-221-38/+6
* Fix the handling of edge cases in ARM shifted operands.Tim Northover2012-09-224-8/+35
* [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.Chad Rosier2012-09-211-0/+4
* Add comment.Chad Rosier2012-09-211-1/+2
* [fast-isel] Fallback to SelectionDAG isel if we require strict alignment forChad Rosier2012-09-211-0/+6
* Cortex-A9 latency fixes (w/ -schedmodel only).Andrew Trick2012-09-211-5/+5
* [fast-isel] Fallback to SelectionDAG isel if we require strict alignment forChad Rosier2012-09-211-0/+6
* Tidy up. Whitespace.Jim Grosbach2012-09-211-2/+2
* Tidy up. Formatting.Jim Grosbach2012-09-211-1/+1
* ARM: Use a dedicated intrinsic for vector bitwise select.Jim Grosbach2012-09-211-2/+29
* Change enum type in a static table to uint8_t instead. Saves about 700 hundre...Craig Topper2012-09-201-6/+6
* MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648Evan Cheng2012-09-181-2/+4
* When creating MCAsmBackend pass the CPU string as well. In X86AsmBackendRoman Divacky2012-09-182-2/+2
* More domain conversion; convert VFP VMOVS to NEON instructions in more cases ...James Molloy2012-09-181-13/+56
* TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine m...Andrew Trick2012-09-181-1/+2
* Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byteEvan Cheng2012-09-182-5/+42
* Revert r164061-r164067. Most of the new subtarget emitter.Andrew Trick2012-09-171-2/+1
* TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine m...Andrew Trick2012-09-171-1/+2
* Removed the VMLxForwarding feature for the Cortex-A15 target.Silviu Baranga2012-09-171-2/+1
* Use LLVM_DELETED_FUNCTION in place of 'DO NOT IMPLEMENT' comments.Craig Topper2012-09-151-2/+2
* Implement getNumLDMAddresses and expose through ARMBaseInstrInfo.Andrew Trick2012-09-142-0/+34
* Cortex-A9 instruction-level scheduling machine model.Andrew Trick2012-09-141-3/+594
* Fix Doxygen issues:Dmitri Gribenko2012-09-141-1/+1
* This patch introduces A15 as a target in LLVM.Silviu Baranga2012-09-139-30/+41
* Rename the isMemory() function to isMem(). No functional change intended.Chad Rosier2012-09-111-22/+22
* Remove redundant semicolons which are null statements.Dmitri Gribenko2012-09-101-1/+1
* Don't attempt to use flags from predicated instructions.Jakob Stoklund Olesen2012-09-101-2/+8
* Set operation action for FFLOOR to Expand for all vector types for X86. Set F...Craig Topper2012-09-081-0/+1
* Custom DAGCombine for and/or/xor are for all ARMs.Jakob Stoklund Olesen2012-09-071-6/+3
* MC: Overhaul handling of .lcommBenjamin Kramer2012-09-071-1/+0
* Diagnose invalid alignments on duplicating VLDn instructions.Tim Northover2012-09-061-0/+4
* Check for invalid alignment values when decoding VLDn/VSTn (single ln) instru...Tim Northover2012-09-061-8/+38
* Use correct part of complex operand to encode VST1 alignment.Tim Northover2012-09-061-2/+2
* Fix a few old-GCC warnings. No functional change.Nadav Rotem2012-09-061-1/+1
* Fix self-host; ensure signedness is consistent.James Molloy2012-09-061-2/+2
* Improve codegen for BUILD_VECTORs on ARM.James Molloy2012-09-061-10/+56
* Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to...James Molloy2012-09-062-17/+66
* Remove predicated pseudo-instructions.Jakob Stoklund Olesen2012-09-052-100/+0
* Use predication instead of pseudo-opcodes when folding into MOVCC.Jakob Stoklund Olesen2012-09-051-56/+31
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