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path: root/lib/Target/CellSPU/SPUInstrInfo.cpp
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* Remove tabs.Bill Wendling2012-07-191-9/+9
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-201-16/+16
* Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-201-40/+36
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Fix a iterator out of bounds error, that triggers rarely.Kalle Raiskila2011-10-111-0/+2
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-1/+1
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-12/+0
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-1/+12
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-011-2/+2
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-1/+2
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-281-1/+3
* Add branch hinting for SPU. Kalle Raiskila2011-02-281-3/+61
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a...Anton Korobeynikov2011-01-101-2/+2
* Various bits of framework needed for precise machine-level selectionAndrew Trick2010-12-241-0/+11
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-161-142/+0
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-111-82/+0
* Replace copyRegToReg with copyPhysReg for CellSPU.Jakob Stoklund Olesen2010-07-111-28/+6
* Mark the SPU 'lr' instruction to never have side effects. Kalle Raiskila2010-06-211-2/+0
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-171-7/+6
* Make SPU backend not assert on jump tables.Kalle Raiskila2010-05-111-0/+3
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-4/+2
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-6/+8
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-4/+4
* Teach AnalyzeBranch, RemoveBranch and the branchDale Johannesen2010-04-021-1/+14
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-051-4/+0
* Remove Streams.h from the targets.Benjamin Kramer2009-08-231-9/+9
* Remove unused member functions.Eli Friedman2009-07-241-74/+0
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-4/+4
* Implement changes from Chris's feedback.Torok Edwin2009-07-081-12/+7
* Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the...Evan Cheng2009-07-011-2/+5
* Remember to set def-flag on register loaded from stack slot in CellSPU.Jakob Stoklund Olesen2009-05-161-1/+1
* Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling2009-05-131-4/+4
* CellSPU:Scott Michel2009-03-171-4/+1
* CellSPU:Scott Michel2009-03-161-1/+6
* Factor out the code to add a MachineOperand to a MachineInstrBuilder.Dan Gohman2009-02-181-18/+4
* Remove non-DebugLoc versions of BuildMI from Alpha and Cell.Dale Johannesen2009-02-131-4/+6
* Eliminate a couple of non-DebugLoc BuildMI variants.Dale Johannesen2009-02-121-2/+4
* Move debug loc info along when the spiller creates new instructions.Bill Wendling2009-02-121-16/+24
* Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nastyEvan Cheng2009-02-091-2/+4
* Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.Evan Cheng2009-02-061-8/+0
* Untabify code.Scott Michel2009-01-261-12/+12
* CellSPU:Scott Michel2009-01-261-2/+2
* CellSPU:Scott Michel2009-01-211-1/+8
* Change TargetInstrInfo::isMoveInstr to return source and destination sub-regi...Evan Cheng2009-01-201-1/+4
* Fix off-by-one error in traversing an array; this fixes a test.Misha Brukman2009-01-071-1/+1
* CellSPU:Scott Michel2009-01-061-1/+26
* CellSPU:Scott Michel2009-01-031-56/+92
* - Make copyRegToReg use the "LR" assembler synonym for "OR". Makes findingScott Michel2009-01-021-38/+50
* - Start moving target-dependent nodes that could be represented by anScott Michel2008-12-301-15/+14
* - Remove Tilmann's custom truncate lowering: it completely hosed overScott Michel2008-12-271-13/+42