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* Fix constant pool loads, and remove broken versions of addConstantPoolReference.Owen Anderson2008-09-061-12/+0
* Clean up uses of TargetLowering::getTargetMachine.Dan Gohman2008-09-041-1/+1
* Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen2008-09-041-0/+10
* fix a bunch of 80-col violationsGabor Greif2008-08-312-15/+33
* Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTRBill Wendling2008-08-311-3/+7
* erect abstraction boundaries for accessing SDValue members, rename Val -> Nod...Gabor Greif2008-08-283-61/+61
* disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif2008-08-261-1/+1
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ...Owen Anderson2008-08-262-4/+6
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-5/+4
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-211-1/+1
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-214-6/+8
* Use cast instead of dyn_cast.Dan Gohman2008-08-201-2/+2
* Fix broken CellSPU lowering, re-instate braces in LegalizeNate Begeman2008-07-291-2/+3
* Rename SDOperand to SDValue.Dan Gohman2008-07-274-348/+348
* More tab removals.Bill Wendling2008-07-221-3/+3
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-171-1/+1
* Somehow, custom lowering of i64 multiplications got dropped along the way.Scott Michel2008-07-161-104/+105
* Trim unnecessary #includes.Dan Gohman2008-07-111-1/+0
* Emit debug info for data-only files on Cell SPU.Dale Johannesen2008-07-091-3/+5
* Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman2008-07-071-4/+4
* Add explicit keywords.Dan Gohman2008-07-071-1/+1
* - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propaga...Evan Cheng2008-07-031-6/+8
* Add a new getMergeValues method that does not needDuncan Sands2008-07-021-16/+5
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-3/+3
* Don't use ISD namespace opcodes for MachineInstrs.Dan Gohman2008-06-301-2/+2
* Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect itsDan Gohman2008-06-301-1/+1
* Split scheduling from instruction selection.Evan Cheng2008-06-301-7/+4
* Revert the SelectionDAG optimization that makesDuncan Sands2008-06-301-5/+4
* Remove unnecessary #includes.Dan Gohman2008-06-221-1/+0
* Remove comparison methods for MVT. The main causeDuncan Sands2008-06-082-5/+5
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-063-149/+156
* Add necessary 64-bit support so that gcc frontend compiles (mostly). CurrentScott Michel2008-06-025-127/+379
* Remove more iostream header includes. Needed to implement a "FlushStream"Bill Wendling2008-05-293-5/+3
* Add CommonLinkage; currently tentative definitionsDale Johannesen2008-05-141-2/+3
* Change target-specific classes to use more precise static types.Dan Gohman2008-05-142-3/+3
* Clean up the use of static and anonymous namespaces. This turned upDan Gohman2008-05-131-0/+4
* Bug fixes and updates for CellSPU, syncing up with trunk. Most notableScott Michel2008-04-307-53/+133
* no need to implement this method and just have it callChris Lattner2008-04-262-14/+0
* Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not LegalDan Gohman2008-04-121-3/+0
* Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.Evan Cheng2008-03-312-12/+0
* Add explicit keywords.Dan Gohman2008-03-251-1/+1
* Add more patterns to match in the integer comparison test harnesses.Scott Michel2008-03-203-9/+8
* Use PassManagerBase instead of FunctionPassManager for functionsDan Gohman2008-03-112-4/+4
* - Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency.Scott Michel2008-03-101-9/+7
* Default ISD::PREFETCH to expand.Evan Cheng2008-03-101-1/+0
* Integer comparison tests for CellSPU.Scott Michel2008-03-104-75/+182
* Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC'sScott Michel2008-03-101-0/+3
* cell really does support cross-regclass moves, because R3 is in lots of diffe...Chris Lattner2008-03-091-4/+9
* Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ...Evan Cheng2008-03-081-0/+1
* Refine Cell's i64 constant generation code to cover more constants where theScott Michel2008-03-061-7/+28