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* Remove excess semi-colons to quiet warnings.Eric Christopher2012-05-081-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156416 91177308-0d34-0410-b5e6-96231b3b80d8
* Update load/store instruction patterns in Hexagon V4.Sirish Pande2012-05-081-492/+492
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156411 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen2012-05-072-2/+2
| | | | | | | | | | | | | The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156328 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the SubRegClasses field from RegisterClass descriptions.Jakob Stoklund Olesen2012-05-041-3/+1
| | | | | | This information in now computed by TableGen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156152 91177308-0d34-0410-b5e6-96231b3b80d8
* Support for target dependent Hexagon VLIW packetizer.Sirish Pande2012-05-0314-93/+4967
| | | | | | This patch creates and optimizes packets as per Hexagon ISA rules. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156109 91177308-0d34-0410-b5e6-96231b3b80d8
* Extensions of Hexagon V4 instructions.Sirish Pande2012-05-039-1339/+4107
| | | | | | This adds new instructions for Hexagon V4 architecture. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156071 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the PassManager from a reference to a pointer.Bill Wendling2012-05-011-8/+8
| | | | | | | | | | The TargetPassManager's default constructor wants to initialize the PassManager to 'null'. But it's illegal to bind a null reference to a null l-value. Make the ivar a pointer instead. PR12468 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd2012-04-231-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on X86 Atom. Some of our tests failed because the tail merging part of the BranchFolding pass was creating new basic blocks which did not contain live-in information. When the anti-dependency code in the Post-RA scheduler ran, it would sometimes rename the register containing the function return value because the fact that the return value was live-in to the subsequent block had been lost. To fix this, it is necessary to run the RegisterScavenging code in the BranchFolding pass. This patch makes sure that the register scavenging code is invoked in the X86 subtarget only when post-RA scheduling is being done. Post RA scheduling in the X86 subtarget is only done for Atom. This patch adds a new function to the TargetRegisterClass to control whether or not live-ins should be preserved during branch folding. This is necessary in order for the anti-dependency optimizations done during the PostRASchedulerList pass to work properly when doing Post-RA scheduling for the X86 in general and for the Intel Atom in particular. The patch adds and invokes the new function trackLivenessAfterRegAlloc() instead of using the existing requiresRegisterScavenging(). It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of requiresRegisterScavenging(). It changes the all the targets that implemented requiresRegisterScavenging() to also implement trackLivenessAfterRegAlloc(). It adds an assertion in the Post RA scheduler to make sure that post RA liveness information is available when it is needed. It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order to avoid running into the added assertion. Finally, this patch restores the use of anti-dependency checking (which was turned off temporarily for the 3.1 release) for Intel Atom in the Post RA scheduler. Patch by Andy Zhang! Thanks to Jakob and Anton for their reviews. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155395 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r155365, r155366, and r155367. All three of these have regressionChandler Carruth2012-04-2335-11849/+2126
| | | | | | | | | | | test suite failures. The failures occur at each stage, and only get worse, so I'm reverting all of them. Please resubmit these patches, one at a time, after verifying that the regression test suite passes. Never submit a patch without running the regression test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155372 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon V5 (floating point) support.Sirish Pande2012-04-2320-1463/+3374
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155367 91177308-0d34-0410-b5e6-96231b3b80d8
* Support for Hexagon architectural feature, new value jump.Sirish Pande2012-04-238-5/+680
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155366 91177308-0d34-0410-b5e6-96231b3b80d8
* Support for Hexagon VLIW Packetizer.Sirish Pande2012-04-2319-685/+7822
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155365 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build ↵NAKAMURA Takumi2012-04-211-0/+1
| | | | | | | | on MSVC. Thanks to Andy Gibbs, to report the issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155287 91177308-0d34-0410-b5e6-96231b3b80d8
* HexagonISelLowering.cpp: Reorder #includes.NAKAMURA Takumi2012-04-211-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155286 91177308-0d34-0410-b5e6-96231b3b80d8
* HexagonInstPrinter.cpp: Suppress -Wunused-variable warnings with -Asserts.NAKAMURA Takumi2012-04-211-6/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155281 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change ↵Craig Topper2012-04-204-26/+25
| | | | | | since they are equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
* This reverts a long string of commits to the Hexagon backend. TheseChandler Carruth2012-04-1836-12059/+1962
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commits have had several major issues pointed out in review, and those issues are not being addressed in a timely fashion. Furthermore, this was all committed leading up to the v3.1 branch, and we don't need piles of code with outstanding issues in the branch. It is possible that not all of these commits were necessary to revert to get us back to a green state, but I'm going to let the Hexagon maintainer sort that out. They can recommit, in order, after addressing the feedback. Reverted commits, with some notes: Primary commit r154616: HexagonPacketizer - There are lots of review comments here. This is the primary reason for reverting. In particular, it introduced large amount of warnings due to a bad construct in tablegen. - Follow-up commits that should be folded back into this when reposting: - r154622: CMake fixes - r154660: Fix numerous build warnings in release builds. - Please don't resubmit this until the three commits above are included, and the issues in review addressed. Primary commit r154695: Pass to replace transfer/copy ... - Reverted to minimize merge conflicts. I'm not aware of specific issues with this patch. Primary commit r154703: New Value Jump. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154703: Remove iostream usage - r154758: Fix CMake builds - r154759: Fix build warnings in release builds - Please incorporate these fixes and and review feedback before resubmitting. Primary commit r154829: Hexagon V5 (floating point) support. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154841: Remove unused variable (fixing build warnings) There are also accompanying Clang commits that will be reverted for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155047 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused variableDavid Blaikie2012-04-161-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154841 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon V5 (Floating Point) Support.Sirish Pande2012-04-1619-1468/+3365
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154829 91177308-0d34-0410-b5e6-96231b3b80d8
* HexagonCopyToCombine.cpp: Silence two warnings, -Wunused-variable, with ↵NAKAMURA Takumi2012-04-151-0/+2
| | | | | | -Asserts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154759 91177308-0d34-0410-b5e6-96231b3b80d8
* Target/Hexagon: Tweak to fix msvc build.NAKAMURA Takumi2012-04-151-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154758 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove iostream from New Value Jump.Sirish Pande2012-04-131-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154703 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for Hexagon Architectural feature, New Value Jump.Sirish Pande2012-04-137-10/+684
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154696 91177308-0d34-0410-b5e6-96231b3b80d8
* Pass to replace tranfer/copy instructions into combine instruction where ↵Sirish Pande2012-04-135-0/+484
| | | | | | possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154695 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence various build warnings from Hexagon backend that show up in release ↵Craig Topper2012-04-135-240/+220
| | | | | | builds. Mostly converting 'assert(0)' to 'llvm_unreachable' to silence warnings about missing returns. Also fold some variable declarations into asserts to prevent the variables from being unused in release builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154660 91177308-0d34-0410-b5e6-96231b3b80d8
* Update CMake build.Ted Kremenek2012-04-122-4/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154622 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon: fix CMake error.Evandro Menezes2012-04-121-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154620 91177308-0d34-0410-b5e6-96231b3b80d8
* HexagonPacketizer patch.Sirish Pande2012-04-1218-485/+7546
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154616 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon: enable assembler output through the MC layer.Evandro Menezes2012-04-1216-376/+685
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154597 91177308-0d34-0410-b5e6-96231b3b80d8
* Prune some includesCraig Topper2012-03-271-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153502 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some unnecessary forward declarations.Craig Topper2012-03-221-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153245 91177308-0d34-0410-b5e6-96231b3b80d8
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-1714-25/+21
| | | | | | some superfluous forward declarations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some copy and paste remnants of Cell and SPU in Hexagon files.Craig Topper2012-03-174-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152981 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo in file header.Craig Topper2012-03-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152980 91177308-0d34-0410-b5e6-96231b3b80d8
* Pass TargetOptions to HexagonTargetMachine constructor by reference to match ↵Craig Topper2012-03-172-3/+4
| | | | | | other targets and the base class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152979 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more static tables of registers used by calling convention to ↵Craig Topper2012-03-111-3/+3
| | | | | | uint16_t to reduce space. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152538 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper2012-03-051-4/+4
| | | | | | static data size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152016 91177308-0d34-0410-b5e6-96231b3b80d8
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
* Use uint16_t to store registers in callee saved register tables to reduce ↵Craig Topper2012-03-042-5/+5
| | | | | | size of static data. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit r151623 with fix. Only issue special no-return calls if it's a ↵Evan Cheng2012-02-282-2/+2
| | | | | | direct call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151645 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack ↵Daniel Dunbar2012-02-282-2/+2
| | | | | | prediction. ...", it is breaking the Clang build during the Compiler-RT part. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151630 91177308-0d34-0410-b5e6-96231b3b80d8
* Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng2012-02-282-2/+2
| | | | | | | | | | | | | | | | | | the processor keeps a return addresses stack (RAS) which stores the address and the instruction execution state of the instruction after a function-call type branch instruction. Calling a "noreturn" function with normal call instructions (e.g. bl) can corrupt RAS and causes 100% return misprediction so LLVM should use a unconditional branch instead. i.e. mov lr, pc b _foo The "mov lr, pc" is issued in order to get proper backtrace. rdar://8979299 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete incorrect reference to inexistent Hexagon architecture manuals.Evandro Menezes2012-02-271-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151582 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove HexagonGenIntrinsics.inc from Hexagon cmake file. It does not appear ↵Craig Topper2012-02-271-1/+0
| | | | | | in the Makefile and the output it produces isn't used. The Hexagon intrinsics are all in the global Intrinsics.gen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151514 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused cl::opt, make another opt static.Benjamin Kramer2012-02-241-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151398 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the numbering of some of the registers and reclassify a couple of them.Brendon Cahoon2012-02-231-66/+64
| | | | | | | | Also, some basic clean up. Patch by Evandro Menezes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151266 91177308-0d34-0410-b5e6-96231b3b80d8
* Efficient pattern for store truncate. Patch by Evandro Menezes.Sirish Pande2012-02-224-22/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151166 91177308-0d34-0410-b5e6-96231b3b80d8
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-1828-39/+40
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimize redundant sign extends and negation of predicates.Sirish Pande2012-02-1515-209/+1037
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150606 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Replacing HexagonOptimizeSZExtends with HexagonPeephole."Eric Christopher2012-02-152-292/+129
| | | | | | This reverts commit 1656806a944bbd23e98c6e578810fe02495ab741. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150605 91177308-0d34-0410-b5e6-96231b3b80d8
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