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path: root/lib/Target/Mips/MipsRegisterInfo.cpp
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* Turn on post register allocation scheduler.Akira Hatanaka2012-03-281-0/+5
* Emit all directives except for ".cprestore" during asm printing rather than emitAkira Hatanaka2012-03-281-3/+1
* Remove trailing white space.Akira Hatanaka2012-03-271-1/+1
* Reserve hardware registers.Akira Hatanaka2012-03-271-0/+4
* Reorder includes in Target backends to following coding standards. Remove som...Craig Topper2012-03-171-1/+1
* Use uint16_t to store registers and opcode in static tables in the target spe...Craig Topper2012-03-111-2/+2
* Use uint16_t to store registers in callee saved register tables to reduce siz...Craig Topper2012-03-041-1/+1
* Changes for migrating to using register mask operands.Akira Hatanaka2012-03-011-33/+17
* remove blanks, and some code formatJia Liu2012-02-281-12/+12
* Add an option to use a virtual register as the global base register instead ofAkira Hatanaka2012-02-241-2/+8
* remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.Jia Liu2012-02-171-1/+1
* Modify MipsRegisterInfo::eliminateFrameIndex to use MipsAnalyzeImmediate toAkira Hatanaka2012-01-251-12/+34
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-2/+0
* Cleanup Mips code and rename some variables. Patch by Jack CarterBruno Cardoso Lopes2011-12-301-92/+0
* Add register HWR29 numbering. Patch by Jack CarterBruno Cardoso Lopes2011-12-061-0/+1
* Fix functions in MipsFrameLowering.cpp and MipsRegisterInfo.cpp. Use 64-bitAkira Hatanaka2011-11-151-2/+4
* Use array_lengthof to compute the number of iterations of a loop.Akira Hatanaka2011-11-071-6/+6
* Fix function MipsRegisterInfo::getRegisterNumbering.Akira Hatanaka2011-09-271-33/+81
* Add definitions of 64-bit register files. Add code for returning Mips64's set...Akira Hatanaka2011-09-231-9/+56
* Add F31 to the set of callee-saved registers.Akira Hatanaka2011-09-221-1/+1
* Make F31 and D15 non-reserved registers.Akira Hatanaka2011-09-091-2/+0
* Mips32 does not reserve even-numbered floating point registers.Akira Hatanaka2011-09-091-5/+0
* Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions forEvan Cheng2011-07-181-1/+0
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-15/+1
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-1/+0
* Simplify MipsRegisterInfo::eliminateFrameIndex.Akira Hatanaka2011-07-071-33/+13
* Reverse order of operands of address operand mem so that the base operand comesAkira Hatanaka2011-07-071-2/+2
* Improve Mips back-end's handling of DBG_VALUE. Akira Hatanaka2011-07-011-22/+31
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-2/+1
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-271-1/+3
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-241-3/+4
* Re-apply 132758 and 132768 which were speculatively reverted in 132777. Akira Hatanaka2011-06-211-4/+6
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-091-0/+2
* Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.Eric Christopher2011-06-091-6/+4
* Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of theAkira Hatanaka2011-06-081-4/+6
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-301-0/+4
* Change the set of callee-saved registers for non-MIPS32 architectures specifiedAkira Hatanaka2011-05-281-9/+1
* Add support for C++ exception handling.Akira Hatanaka2011-05-261-2/+1
* Enable printing of immediates that do not fit in 16-bit. .cprestore can haveAkira Hatanaka2011-05-241-1/+1
* Change StackDirection from StackGrowsUp to StackGrowsDown.Akira Hatanaka2011-05-231-22/+23
* Use the correct register to access stack frame objects.Akira Hatanaka2011-05-211-10/+31
* Make $fp and $ra callee-saved registers and let PrologEpilogInserter handleAkira Hatanaka2011-05-201-3/+3
* Increase number of available registers when target is MIPS32.Akira Hatanaka2011-05-191-1/+9
* 1. Keep lines in 80 columns.Akira Hatanaka2011-05-061-1/+1
* Fix function MipsRegisterInfo::getRegisterNumbering.Akira Hatanaka2011-05-031-10/+10
* Reverse unnecessary changes made in r129606 and r129608. There is no change i...Akira Hatanaka2011-04-151-5/+5
* Fix lines that have incorrect indentation or exceed 80 columns. There is no c...Akira Hatanaka2011-04-151-7/+9
* Expands register/immediate pairs when the immediate is too large to fit in 16...Bruno Cardoso Lopes2011-03-041-2/+35
* Remove (hopefully) all trailing whitespaces from the mips backend. Patch by H...Bruno Cardoso Lopes2011-03-041-11/+11
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