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* Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,Akira Hatanaka2012-04-112-3/+9
* Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.Akira Hatanaka2012-04-113-0/+65
* Fix bugs in lowering of FCOPYSIGN nodes.Akira Hatanaka2012-04-111-52/+91
* Reapply 154038 without the failing test.Akira Hatanaka2012-04-041-3/+3
* Revert r154038. It was causing make check failures.Owen Anderson2012-04-041-3/+3
* Fix LowerGlobalAddress to produce instructions with the correct relocationAkira Hatanaka2012-04-041-3/+3
* Fix LowerJumpTable to produce instructions with the correct relocationAkira Hatanaka2012-04-041-2/+2
* Fix LowerConstantPool to produce instructions with the correct relocationAkira Hatanaka2012-04-041-2/+2
* Fix LowerBlockAddress to produce instructions with the correct relocationAkira Hatanaka2012-04-041-2/+2
* Revert r153924. Delete test/MC/Disassembler/Mips and lib/Target/Mips/Disassem...Akira Hatanaka2012-04-034-0/+0
* Revert r153924. There were buildbot failures.Akira Hatanaka2012-04-0313-925/+104
* MIPS disassembler support.Akira Hatanaka2012-04-0313-104/+925
* Initial 64 bit direct object support.Akira Hatanaka2012-04-024-23/+49
* Move getOpcodeName from the various target InstPrinters into the superclass M...Benjamin Kramer2012-04-022-5/+0
* Remove getInstructionName from MCInstPrinter implementations in favor of usin...Craig Topper2012-04-022-3/+2
* Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ...Craig Topper2012-04-022-3/+5
* Select static relocation model if it is jitting.Akira Hatanaka2012-03-311-1/+3
* Expand FREM.Akira Hatanaka2012-03-291-0/+2
* Turn off post-RA scheduler by default.Akira Hatanaka2012-03-281-1/+1
* Turn on post register allocation scheduler.Akira Hatanaka2012-03-284-0/+22
* Sort relocation entries before they are written out to a file. MIPS ABIAkira Hatanaka2012-03-281-0/+103
* Emit all directives except for ".cprestore" during asm printing rather than emitAkira Hatanaka2012-03-287-151/+188
* Mark flag neverHasSideEffects of pattern-less instructions that do not haveAkira Hatanaka2012-03-281-0/+5
* Remove trailing white space.Akira Hatanaka2012-03-271-1/+1
* Add member EmitNOAT and its setter and getter functions to class MipsFunction...Akira Hatanaka2012-03-271-1/+6
* Prune some includesCraig Topper2012-03-273-4/+1
* Pass the llvm IR pointer value and offset to the constructor ofAkira Hatanaka2012-03-271-9/+13
* Fix bug in LowerConstantPool. Akira Hatanaka2012-03-271-1/+1
* Add T9 to the list of live-in registers of the entry basic block. Akira Hatanaka2012-03-271-0/+2
* Retrieve and add the offset of a symbol in applyFixup rather than retrieve andAkira Hatanaka2012-03-272-67/+67
* Define function MipsGetSymAndOffset which returns a fixup's symbol and theAkira Hatanaka2012-03-271-0/+30
* Rewrite computation of Value in adjustFixupValue so that the upper 48-bits areAkira Hatanaka2012-03-271-1/+1
* Reserve hardware registers.Akira Hatanaka2012-03-271-0/+4
* Prune some includes and forward declarations.Craig Topper2012-03-261-7/+1
* Add typecast to silence -Wswitch warning introduced by r153153.Craig Topper2012-03-211-1/+1
* Incremental big endian patch by Jack Carter.Akira Hatanaka2012-03-212-13/+30
* Reorder includes in Target backends to following coding standards. Remove som...Craig Topper2012-03-1713-20/+16
* Convert more static tables of registers used by calling convention to uint16_...Craig Topper2012-03-111-10/+10
* Use uint16_t to store registers and opcode in static tables in the target spe...Craig Topper2012-03-111-2/+2
* Do not custom lower i64 nodes if i64 is not a legal type. Move lines that setAkira Hatanaka2012-03-101-11/+14
* Lower SETCC nodes during legalization. Previously, it was lowered in DAG comb...Akira Hatanaka2012-03-092-20/+16
* Remove unused header files.Akira Hatanaka2012-03-091-2/+0
* Fix undefined behavior in the Mips backend.Ahmed Charles2012-03-092-15/+15
* Invoke setTargetDAGCombine for SELECT.Akira Hatanaka2012-03-081-0/+1
* Swap the operands of a select node if the false (the second) operand is 0.Akira Hatanaka2012-03-081-0/+35
* Set minimum function alignment to 3 if target is Mips64.Akira Hatanaka2012-03-081-1/+1
* This patch eliminates redundant instructions that produce 0.Akira Hatanaka2012-03-081-1/+50
* Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-052-2/+4
* Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce stati...Craig Topper2012-03-052-3/+3
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-1/+1
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