| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Refactor ABI code in the PowerPC backend. | Tilmann Scheller | 2009-07-03 | 1 | -33/+33 |
| * | Implement the SVR4 ABI for PowerPC. | Tilmann Scheller | 2009-07-03 | 1 | -2/+2 |
| * | Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. | Dan Gohman | 2008-12-03 | 1 | -2/+2 |
| * | Add a sanity-check to tablegen to catch the case where isSimpleLoad | Dan Gohman | 2008-12-03 | 1 | -0/+2 |
| * | Add a RM pseudoreg for the rounding mode, which | Dale Johannesen | 2008-10-29 | 1 | -143/+163 |
| * | Mark MFCR as reading all condition code registers. | Dale Johannesen | 2008-10-24 | 1 | -0/+2 |
| * | Mark defs and uses of CTR and LR correctly. | Dale Johannesen | 2008-10-23 | 1 | -6/+16 |
| * | Fix warnings about mb/me being potentially used | Duncan Sands | 2008-10-16 | 1 | -2/+2 |
| * | Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as | Chris Lattner | 2008-10-11 | 1 | -2/+2 |
| * | Rename ConstantSDNode::getValue to getZExtValue, for consistency | Dan Gohman | 2008-09-12 | 1 | -14/+14 |
| * | Implement partial-word binary atomics on ppc. | Dale Johannesen | 2008-08-28 | 1 | -0/+66 |
| * | Implement 32 & 64 bit versions of PPC atomic | Dale Johannesen | 2008-08-25 | 1 | -0/+22 |
| * | Remove PPC-specific lowering for atomics; the | Dale Johannesen | 2008-08-25 | 1 | -29/+6 |
| * | Implement __sync_synchronize on ppc32. Patch by Gary Benson. | Dale Johannesen | 2008-08-22 | 1 | -0/+12 |
| * | Rewrite ppc code generated for __sync_{bool|val}_compare_and_swap | Dale Johannesen | 2008-08-22 | 1 | -4/+7 |
| * | Implement ISD::TRAP support on PPC | Nate Begeman | 2008-08-11 | 1 | -0/+3 |
| * | Implement llvm.atomic.cmp.swap.i32 on PPC. Patch by Gary Benson! | Evan Cheng | 2008-07-12 | 1 | -29/+52 |
| * | Provide correct encoding for PPC LWARX instructions. | Anton Korobeynikov | 2008-06-27 | 1 | -2/+2 |
| * | Tail call optimization improvements: | Arnold Schwaighofer | 2008-04-30 | 1 | -0/+63 |
| * | 64-bit atomic operations. | Evan Cheng | 2008-04-19 | 1 | -15/+15 |
| * | PPC32 atomic operations. | Evan Cheng | 2008-04-19 | 1 | -0/+39 |
| * | Replace all target specific implicit def instructions with a target independe... | Evan Cheng | 2008-03-15 | 1 | -12/+0 |
| * | Add description of individual bits in CR. This fix PR1765. | Nicolas Geoffray | 2008-03-10 | 1 | -4/+14 |
| * | Add support for ppc64 shifts with 7-bit (oversized) shift amount (e.g. PPCshl). | Chris Lattner | 2008-03-07 | 1 | -3/+3 |
| * | Replace SDT_PPCShiftOp in favor of SDTIntBinOps. This allows it to work | Chris Lattner | 2008-03-07 | 1 | -6/+3 |
| * | This is the initial check-in for adding register scavenging to PPC. (Currently, | Bill Wendling | 2008-03-03 | 1 | -2/+5 |
| * | Final de-tabification. | Bill Wendling | 2008-02-27 | 1 | -3/+3 |
| * | Make register scavenging happy by not using a reg (CR0) that isn't defined | Nate Begeman | 2008-02-13 | 1 | -1/+1 |
| * | rename SDTRet -> SDTNone. | Chris Lattner | 2008-01-15 | 1 | -3/+3 |
| * | remove explicit sets of 'neverHasSideEffects' that can now be | Chris Lattner | 2008-01-10 | 1 | -1/+1 |
| * | get def use info more correct. | Chris Lattner | 2008-01-10 | 1 | -1/+2 |
| * | rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. | Chris Lattner | 2008-01-06 | 1 | -2/+2 |
| * | rename isStore -> mayStore to more accurately reflect what it captures. | Chris Lattner | 2008-01-06 | 1 | -1/+1 |
| * | Change the 'isStore' inferrer to look for 'SDNPMayStore' | Chris Lattner | 2008-01-06 | 1 | -4/+8 |
| * | remove some isStore flags that are now inferred automatically. | Chris Lattner | 2008-01-06 | 1 | -3/+6 |
| * | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| * | Mark the "isRemat" instruction as never having side effects. | Bill Wendling | 2007-12-19 | 1 | -1/+1 |
| * | Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materia... | Evan Cheng | 2007-12-12 | 1 | -0/+2 |
| * | Initial commit of the machine code LICM pass. It successfully hoists this: | Bill Wendling | 2007-12-07 | 1 | -6/+9 |
| * | Unifacalize the CALLSEQ{START,END} stuff. | Bill Wendling | 2007-11-13 | 1 | -5/+5 |
| * | Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack | Bill Wendling | 2007-11-13 | 1 | -7/+8 |
| * | Add a flag for indirect branch instructions. | Owen Anderson | 2007-11-12 | 1 | -1/+2 |
| * | Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with rig... | Evan Cheng | 2007-10-23 | 1 | -2/+4 |
| * | Next PPC long double bits: ppcf128->i32 conversion. | Dale Johannesen | 2007-10-10 | 1 | -0/+46 |
| * | Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. | Evan Cheng | 2007-09-11 | 1 | -4/+6 |
| * | Some out operands were incorrectly specified as input operands. | Evan Cheng | 2007-08-01 | 1 | -8/+8 |
| * | No more noResults. | Evan Cheng | 2007-07-21 | 1 | -7/+6 |
| * | Oops. These stores actually produce results. | Evan Cheng | 2007-07-20 | 1 | -5/+5 |
| * | Change instruction description to split OperandList into OutOperandList and | Evan Cheng | 2007-07-19 | 1 | -172/+179 |
| * | It's not necessary to do rounding for alloca operations when the requested | Dan Gohman | 2007-07-18 | 1 | -0/+1164 |
