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path: root/lib/Target/PowerPC/PPCRegisterInfo.cpp
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* Trim unnecessary #includes.Dan Gohman2008-07-111-1/+0
* Simplify this use of BuildMI. This is also in preparation forDan Gohman2008-07-071-3/+1
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-2/+2
* Tail call optimization improvements:Arnold Schwaighofer2008-04-301-9/+173
* Reverse sense of unwind-tables option. This meansDale Johannesen2008-04-141-1/+1
* Implement new llc flag -disable-required-unwind-tables.Dale Johannesen2008-04-081-1/+2
* Cosmetic changes per EH patch review feedback.Dale Johannesen2008-04-021-3/+3
* Recommitting EH patch; this should answer most of theDale Johannesen2008-04-021-2/+5
* Revert 49006 for the moment.Dale Johannesen2008-04-011-5/+2
* Emit exception handling info for functions which areDale Johannesen2008-03-311-2/+5
* Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.Evan Cheng2008-03-311-9/+0
* detabify llvm, patch by Mike Stump!Chris Lattner2008-03-201-21/+21
* Disable prolog code that aligns the stack when aDale Johannesen2008-03-101-7/+17
* Change the "enable/disable" mechanism so that we can enable PPC registerBill Wendling2008-03-101-12/+19
* Add description of individual bits in CR. This fix PR1765.Nicolas Geoffray2008-03-101-32/+65
* Removed spurious EnablePPCRS check.Bill Wendling2008-03-041-4/+3
* Use a command-line option to turn register scavenging on/off for PPC.Bill Wendling2008-03-041-32/+43
* This is the initial check-in for adding register scavenging to PPC. (Currently,Bill Wendling2008-03-031-68/+288
* Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR.Chris Lattner2008-02-131-0/+1
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-1/+2
* Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.star...Evan Cheng2008-02-011-10/+0
* Add an extra operand to LABEL nodes which distinguishes between debug, EH, or...Evan Cheng2008-01-311-4/+4
* Makes the same change in ppc backend: avoid inserting prologue before debug l...Evan Cheng2008-01-311-0/+10
* rename MachineInstr::setInstrDescriptor -> setDescChris Lattner2008-01-111-1/+1
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-1/+1
* Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptorChris Lattner2008-01-071-2/+1
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-071-79/+0
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-228/+0
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-28/+0
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-9/+12
* Add new shorter predicates for testing machine operands for various types: Chris Lattner2007-12-301-7/+6
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewis...Chris Lattner2007-12-301-4/+4
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
* Fix a significant code quality regression I introduced on PPC64 quite Chris Lattner2007-12-081-1/+1
* implement __builtin_return_addr(0) on ppc.Chris Lattner2007-12-081-2/+7
* refactor some code to avoid overloading the name 'usesLR' in Chris Lattner2007-12-081-7/+9
* Fix a compilation warning.Evan Cheng2007-12-081-1/+1
* Added canFoldMemoryOperand for PPC.Evan Cheng2007-12-051-0/+20
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-051-13/+15
* Remove redundant foldMemoryOperand variants and other code clean up.Evan Cheng2007-12-021-2/+5
* Fix a crash on invalid code due to memcpy lowering.Chris Lattner2007-11-271-25/+30
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-131-1/+1
* Completely forgot, that we have some debug information emission on PPC. This ...Anton Korobeynikov2007-11-121-2/+2
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-0/+5
* - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but o...Evan Cheng2007-10-181-2/+2
* Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister p...Evan Cheng2007-10-181-6/+6
* Fix a bug handling frame references in ppc inline asm when the frame offsetChris Lattner2007-10-161-24/+33
* - Added a few target hooks to generate load / store instructions from / to anyEvan Cheng2007-10-051-47/+154
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-7/+13
* Fix comments.Evan Cheng2007-09-141-4/+4
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