aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/PowerPC
Commit message (Expand)AuthorAgeFilesLines
* Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument f...Evan Cheng2010-07-071-1/+1
* Split the SDValue out of OutputArg so that SelectionDAG-independentDan Gohman2010-07-072-11/+20
* Propagate debug loc.Devang Patel2010-07-061-4/+5
* Reapply r107655 with fixes; insert the pseudo instruction intoDan Gohman2010-07-061-17/+29
* Revert r107655.Dan Gohman2010-07-061-29/+17
* Fix a bunch of custom-inserter functions to handle the case whereDan Gohman2010-07-061-17/+29
* Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill sl...Evan Cheng2010-07-032-19/+13
* Remove initialized but otherwise unused variables.Duncan Sands2010-06-291-1/+0
* The hasMemory argument is irrelevant to how the argumentDale Johannesen2010-06-252-9/+3
* Eliminate unnecessary uses of getZExtValue().Dan Gohman2010-06-181-3/+3
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-172-8/+8
* Reapply r105521, this time appending "LLU" to 64 bitBruno Cardoso Lopes2010-06-081-1/+1
* revert r105521, which is breaking the buildbots with stuff like this:Chris Lattner2010-06-051-1/+1
* Initial AVX support for some instructions. No patterns matchedBruno Cardoso Lopes2010-06-051-1/+1
* Remove the TargetRegisterClass member from CalleeSavedInfoRafael Espindola2010-06-021-14/+12
* cleanupRafael Espindola2010-06-022-137/+0
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-19/+11
* Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen2010-05-261-11/+19
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-19/+11
* Remove NumberHack entirely.Jakob Stoklund Olesen2010-05-251-4/+4
* Switch SubRegSet to using symbolic SubRegIndicesJakob Stoklund Olesen2010-05-241-8/+12
* Replace the tablegen RegisterClass field SubRegClassList with an alist-like dataJakob Stoklund Olesen2010-05-241-1/+1
* Add SubRegIndex defs to PowerPC. It looks like the CR subregister indices areJakob Stoklund Olesen2010-05-241-0/+7
* Implement @llvm.returnaddress. rdar://8015977.Evan Cheng2010-05-221-1/+4
* The PPC MFCR instruction implicitly uses all 8 of the CRDale Johannesen2010-05-205-21/+24
* Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling2010-05-141-1/+1
* Set isTerminator on TRAP instructions.Dan Gohman2010-05-141-1/+1
* Don't use isBarrier for the PowerPC sync instruction. isBarrier is forDan Gohman2010-05-141-1/+0
* Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman2010-05-114-4/+13
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-062-5/+4
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-062-4/+8
* No-ops emitted for scheduling don't correspond with anything in theDan Gohman2010-05-051-2/+0
* Implement builtin_return_address(x) and builtin_frame_address(x) Dale Johannesen2010-05-031-23/+34
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-012-9/+5
* Make naked functions work on PPC.Dale Johannesen2010-04-291-1/+7
* Frame index can be negative.Evan Cheng2010-04-292-2/+2
* Use MachineOperand::is* predicates.Devang Patel2010-04-271-3/+3
* Add PPC AsmPrinter handling for target-specific form ofDale Johannesen2010-04-261-0/+18
* Add PPC specific emitFrameIndexDebugValue.Evan Cheng2010-04-262-0/+16
* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-212-2/+2
* Add more const qualifiers on TargetMachine and friends.Dan Gohman2010-04-211-2/+2
* Make processor FUs unique for given itinerary. This extends the limit of 32Anton Korobeynikov2010-04-185-7/+11
* Add const qualifiers to TargetLoweringObjectFile usage.Dan Gohman2010-04-171-6/+6
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-174-80/+87
* Move per-function state out of TargetLowering subclasses and intoDan Gohman2010-04-173-44/+64
* Name these stub files consistently with the SPU and PPC targets' conventions.Chandler Carruth2010-04-172-9/+9
* Add skeleton target-specific SelectionDAGInfo files.Dan Gohman2010-04-163-0/+52
* Eliminate an unnecessary SelectionDAG dependency in getOptimalMemOpType.Dan Gohman2010-04-162-6/+6
* EnablePPC64RS and EnablePPC32RS are used in multiple files, so theyDan Gohman2010-04-152-4/+11
* Fix a bunch of namespace polution.Dan Gohman2010-04-151-8/+8
generated by cgit v1.1 at 2024-09-12 10:28:55 +0000