aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/R600
Commit message (Expand)AuthorAgeFilesLines
* Remove the MachineMove class.Rafael Espindola2013-05-131-0/+1
* Fix the R600 build.Rafael Espindola2013-05-102-3/+2
* R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen ...Tom Stellard2013-05-105-1217/+12
* R600: Expand SUB for v2i32/v4i32Tom Stellard2013-05-101-0/+2
* R600: Expand MUL for v4i32/v2i32Tom Stellard2013-05-101-0/+2
* R600: Expand SRA for v4i32/v2i32Tom Stellard2013-05-101-0/+2
* R600: Expand vselect for v4i32 and v2i32Tom Stellard2013-05-101-0/+3
* R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcodeTom Stellard2013-05-062-1/+14
* R600/SI: Handle arbitrary destination type in SITargetLowering::adjustWritemaskTom Stellard2013-05-061-1/+1
* R600/SI: Add intrinsic for texture image loadingTom Stellard2013-05-063-10/+46
* R600/SI: Add pattern for uint_to_fpTom Stellard2013-05-061-1/+3
* R600/SI: Add patterns for integer maxima / minimaTom Stellard2013-05-061-4/+12
* R600/SI: Add pattern for AMDGPU.trunc intrinsicTom Stellard2013-05-061-1/+3
* R600: Remove dead code from the CodeEmitter v2Tom Stellard2013-05-063-400/+64
* R600: Emit config values in register / value pairsTom Stellard2013-05-062-3/+55
* R600: Stop emitting the instruction type byte before each instructionTom Stellard2013-05-061-33/+2
* R600: Emit ISA for CALL_FS_* instructionsTom Stellard2013-05-061-1/+0
* R600: Expand vector or, shl, srl, and xor nodesTom Stellard2013-05-031-0/+8
* R600: BFI_INT is a vector-only instructionTom Stellard2013-05-031-1/+1
* R600: Add pattern for SHA-256 Ma functionTom Stellard2013-05-033-0/+17
* R600: Clean up comments in Processors.tdTom Stellard2013-05-031-5/+1
* R600: Signed literals are 64bits wideVincent Lejeune2013-05-021-3/+3
* R600: If previous bundle is dot4, PV valid chan is always XVincent Lejeune2013-05-021-38/+51
* R600: Improve asmPrint of ALU clauseVincent Lejeune2013-05-023-4/+20
* R600: Prettier asmPrint of AluVincent Lejeune2013-05-024-13/+45
* R600: Use new tablegen syntax for patternsTom Stellard2013-05-023-447/+381
* R600/SI: remove nonsense select patternTom Stellard2013-05-021-8/+1
* R600: Always use texture cache for compute shadersVincent Lejeune2013-04-301-2/+6
* R600: use native for aluVincent Lejeune2013-04-304-4/+135
* R600: Packetize instructionsVincent Lejeune2013-04-306-3/+464
* R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chipsVincent Lejeune2013-04-305-32/+105
* R600: Add a Bank Swizzle operandVincent Lejeune2013-04-304-11/+19
* R600: Take inner dependency into tex/vtx clausesVincent Lejeune2013-04-301-0/+34
* R600: Turn TEX/VTX into native instructionsVincent Lejeune2013-04-303-15/+50
* R600: Add FetchInst bit to instruction defs to denote vertex/tex instructionsVincent Lejeune2013-04-309-58/+95
* R600: Add some new processor variantsVincent Lejeune2013-04-302-1/+3
* R600: Clean up instruction class definitionsVincent Lejeune2013-04-301-23/+14
* R600: config section now reports use of killgtVincent Lejeune2013-04-301-0/+4
* R600: Use correct CF_END instruction on Northern Island GPUsTom Stellard2013-04-291-1/+1
* R600: Fix encoding of CF_END_{EG, R600} instructionsTom Stellard2013-04-291-0/+1
* R600: Initialize AMDGPUMachineFunction::ShaderType to ShaderType::COMPUTETom Stellard2013-04-261-0/+2
* R600: Initialize BooleanVectorContentsTom Stellard2013-04-241-0/+1
* R600: Use SHT_PROGBITS for the .AMDGPU.config sectionTom Stellard2013-04-241-1/+1
* R600: Use .AMDGPU.config section to emit stacksizeVincent Lejeune2013-04-235-16/+25
* R600: Add CF_ENDVincent Lejeune2013-04-233-44/+77
* Remove unused DwarfSectionOffsetDirective stringMatt Arsenault2013-04-221-2/+0
* ArrayRefize getMachineNode(). No functionality change.Michael Liao2013-04-192-2/+2
* R600: Add pattern for the BFI_INT instructionTom Stellard2013-04-193-0/+24
* R600/SI: Use InstFlag for VOP3 modifier operandsTom Stellard2013-04-192-15/+14
* R600: Make Export Instruction not duplicableVincent Lejeune2013-04-171-1/+3
generated by cgit v1.1 at 2025-11-18 00:44:32 +0000