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* R600: Use .AMDGPU.config section to emit stacksizeVincent Lejeune2013-04-235-16/+25
* R600: Add CF_ENDVincent Lejeune2013-04-233-44/+77
* Remove unused DwarfSectionOffsetDirective stringMatt Arsenault2013-04-221-2/+0
* ArrayRefize getMachineNode(). No functionality change.Michael Liao2013-04-192-2/+2
* R600: Add pattern for the BFI_INT instructionTom Stellard2013-04-193-0/+24
* R600/SI: Use InstFlag for VOP3 modifier operandsTom Stellard2013-04-192-15/+14
* R600: Make Export Instruction not duplicableVincent Lejeune2013-04-171-1/+3
* R600: Export is emitted as a CF_NATIVE instVincent Lejeune2013-04-172-14/+9
* R600: Emit used GPRs countVincent Lejeune2013-04-172-8/+41
* R600/SI: Emit config values in register value pairs.Tom Stellard2013-04-152-3/+38
* R600/SI: Emit configuration value in the .AMDGPU.config ELF sectionTom Stellard2013-04-151-1/+9
* R600: Emit ELF formatted code rather than raw ISA.Tom Stellard2013-04-155-12/+63
* R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused-variable]NAKAMURA Takumi2013-04-111-0/+1
* Whitespace.NAKAMURA Takumi2013-04-111-2/+1
* R600/SI: Add pattern for AMDGPUurecipMichel Danzer2013-04-103-3/+13
* R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when computing cf addrVincent Lejeune2013-04-101-1/+10
* R600/SI: dynamical figure out the reg class of MIMGChristian Konig2013-04-106-2/+63
* R600/SI: adjust writemask to only the used componentsChristian Konig2013-04-104-2/+91
* R600/SI: remove image sample writemaskChristian Konig2013-04-102-14/+13
* R600: Control Flow support for pre EG genVincent Lejeune2013-04-083-72/+240
* R600/SI: Add support for buffer stores v2Tom Stellard2013-04-058-4/+99
* R600/SI: Use same names for corresponding MUBUF operands and encoding fieldsTom Stellard2013-04-052-27/+27
* R600: Add RV670 processorTom Stellard2013-04-051-0/+1
* R600/SI: Add processor types for each SI variantTom Stellard2013-04-052-3/+8
* R600/SI: Avoid generating S_MOVs with 64-bit immediates v2Tom Stellard2013-04-051-2/+5
* R600: Use a mask for offsets when encoding instructionsVincent Lejeune2013-04-041-2/+5
* R600: Fix wrong address when substituting ENDIFVincent Lejeune2013-04-041-1/+1
* R600: Take export into account when computing cf addressVincent Lejeune2013-04-041-0/+4
* R600: Fix last ALU of a clause being emitted in a separate clauseVincent Lejeune2013-04-031-2/+2
* R600: Factorize maximum alu per clause in a single locationVincent Lejeune2013-04-034-2/+6
* R600: Simplify data structure and add DEBUG to R600ControlFlowFinalizerVincent Lejeune2013-04-031-20/+21
* R600: Consider KILLGT as an ALU instructionVincent Lejeune2013-04-032-3/+4
* Target/R600: Fix CMake build to add missing files.NAKAMURA Takumi2013-04-011-0/+3
* R600: Add support for native control flowVincent Lejeune2013-04-015-1/+386
* R600/SI: Share code recording ShaderTypeAttribute between generationsVincent Lejeune2013-04-016-28/+60
* R600: Emit CF_ALU and use true kcache register.Vincent Lejeune2013-04-016-10/+397
* R600: Emit native instructions for texVincent Lejeune2013-03-312-115/+197
* These two are default in the constructor for MCAsmInfo.Eric Christopher2013-03-281-2/+0
* R600/SI: add SETO/SETUO patternsChristian Konig2013-03-271-0/+14
* R600/SI: add cummuting of rev instructionsChristian Konig2013-03-275-34/+87
* R600/SI: add mulhu/mulhs patternsChristian Konig2013-03-273-2/+20
* R600/SI: add srl/sha patterns for SIChristian Konig2013-03-271-2/+6
* R600/SIMCCodeEmitter.cpp: Prune a couple of unused members, STI and Ctx. [-Wu...NAKAMURA Takumi2013-03-261-3/+1
* R600/SI: improve post ISel foldingChristian Konig2013-03-261-31/+43
* R600/SI: improve vector interpolationChristian Konig2013-03-261-0/+20
* R600/SI: avoid unecessary subreg extraction in IMAGE_SAMPLEChristian Konig2013-03-262-14/+8
* R600/SI: switch back to RegPressure schedulingChristian Konig2013-03-263-1/+9
* R600/SI: mark most intrinsics as readnone v2Christian Konig2013-03-261-5/+5
* R600/SI: replace WQM intrinsicChristian Konig2013-03-265-28/+14
* R600/SI: fix ELSE pseudo op handlingChristian Konig2013-03-261-1/+2
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