| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | I documented this file, in an attempt to understand it, with a view toward | Brian Gaeke | 2003-06-03 | 1 | -56/+73 |
| * | Use the new -o tablegen option | Chris Lattner | 2003-06-03 | 1 | -4/+1 |
| * | Constants are laid out in memory in PC-relative form. | Misha Brukman | 2003-06-03 | 1 | -1/+1 |
| * | Added opcode conversion for conditional move of integers. | Misha Brukman | 2003-06-03 | 1 | -0/+50 |
| * | * Convert load/store opcodes from register to immediate forms. | Misha Brukman | 2003-06-03 | 1 | -9/+11 |
| * | Convert load/store opcodes from register to immediate forms, if necessary. | Misha Brukman | 2003-06-03 | 1 | -4/+13 |
| * | Store instructions are different from other Format 3.1/3.2 instructions in that | Misha Brukman | 2003-06-03 | 2 | -7/+43 |
| * | Moved code to modify the opcode from 'reg' to 'imm' form to a more logical pl... | Misha Brukman | 2003-06-03 | 1 | -15/+6 |
| * | * Added section A.34: Move FP register on int reg condition (FMOVr) | Misha Brukman | 2003-06-03 | 1 | -13/+42 |
| * | * Removed unused classes (rd field is always mentioned last); fixed comments. | Misha Brukman | 2003-06-03 | 1 | -38/+34 |
| * | * Removed unused classes: the rd field is always mentioned as the last reg. | Misha Brukman | 2003-06-03 | 1 | -57/+19 |
| * | The rd field goes after the immediate field in format 2.1 instructions. | Misha Brukman | 2003-06-03 | 1 | -2/+1 |
| * | Remove usage of noncopyable classes to clean up doxygen output. | Chris Lattner | 2003-06-02 | 2 | -22/+25 |
| * | Add #include | Chris Lattner | 2003-06-02 | 1 | -0/+1 |
| * | Added MOVR (move int reg on register condition), aka comparison with zero. | Misha Brukman | 2003-06-02 | 3 | -8/+48 |
| * | SparcInstr.def: added 'r' and 'i' versions of MOV(F)cc instructions | Misha Brukman | 2003-06-02 | 4 | -85/+193 |
| * | * Added casts to/from floating-point to integers. | Misha Brukman | 2003-06-02 | 1 | -90/+187 |
| * | compiled with the new SchedGraphCommon | Guochun Shi | 2003-06-02 | 3 | -27/+38 |
| * | Clean up after merging in SparcEmitter.cpp; branches and return work again. | Misha Brukman | 2003-06-02 | 1 | -11/+40 |
| * | Merged in tools/lli/JIT/SparcEmitter.cpp, coupled with the JITResolver taken | Misha Brukman | 2003-06-02 | 2 | -19/+275 |
| * | Deal with %lo/%lm/%hm/%hh flags in getMachineOpValue(). | Brian Gaeke | 2003-06-02 | 1 | -10/+21 |
| * | Make the .inc file depend on $(TBLGEN), so that changes to TableGen followed | Brian Gaeke | 2003-06-01 | 1 | -1/+1 |
| * | Add map info for arguments to call (copies) | Anand Shukla | 2003-06-01 | 1 | -1/+11 |
| * | Renamed a variable. | Vikram S. Adve | 2003-05-31 | 1 | -8/+10 |
| * | Minor changes. | Vikram S. Adve | 2003-05-31 | 1 | -0/+5 |
| * | Added MachineCodeForInstruction object as an argument to | Vikram S. Adve | 2003-05-31 | 2 | -6/+13 |
| * | Changes to allow explicit physical register arguments that have been | Vikram S. Adve | 2003-05-31 | 2 | -42/+96 |
| * | Several bug fixes: globals in call operands were not being pulled out; | Vikram S. Adve | 2003-05-31 | 1 | -12/+43 |
| * | Extensive changes to the way code generation occurs for function | Vikram S. Adve | 2003-05-31 | 6 | -590/+815 |
| * | Reverting previous beautification changes. | Vikram S. Adve | 2003-05-31 | 2 | -384/+408 |
| * | Removed useless code -- the byte order of output code is correct as is. | Misha Brukman | 2003-05-31 | 1 | -6/+1 |
| * | The 'rd' register is consistently mentioned last in instruction definitions. | Misha Brukman | 2003-05-31 | 1 | -4/+16 |
| * | * Put back into action SLL/SRL/SRA{r,i}6 instructions | Misha Brukman | 2003-05-31 | 1 | -8/+8 |
| * | Code beautification, no functional changes. | Misha Brukman | 2003-05-31 | 2 | -408/+384 |
| * | Enabling some of these passes causes lli to break | Misha Brukman | 2003-05-31 | 1 | -0/+6 |
| * | The actual order of parameters in a 2-reg-immediate assembly instructions is | Misha Brukman | 2003-05-31 | 1 | -2/+34 |
| * | When converting virtual registers to immediate constants, change the opcode. | Misha Brukman | 2003-05-30 | 1 | -0/+14 |
| * | Added: | Misha Brukman | 2003-05-30 | 2 | -15/+108 |
| * | Fixed the namespace to match SparcInternals.h; added notes on some missing | Misha Brukman | 2003-05-30 | 1 | -5/+18 |
| * | The register types need to be visible outside of the class to be useful. | Misha Brukman | 2003-05-30 | 1 | -14/+13 |
| * | Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes. | Misha Brukman | 2003-05-30 | 2 | -448/+457 |
| * | Make LLI behave just like LLC with regard to the compile passes it uses. | Misha Brukman | 2003-05-30 | 1 | -0/+15 |
| * | Made the register and immediate versions of instructions consecutive. | Misha Brukman | 2003-05-30 | 1 | -7/+5 |
| * | Because the format of the shift instructions is `shift r, shcnt, r', the | Misha Brukman | 2003-05-30 | 1 | -7/+11 |
| * | Makefile: Make SparcV9CodeEmitter.inc depend on SparcV9_F*.td as well. | Brian Gaeke | 2003-05-30 | 2 | -3/+7 |
| * | so far everything compiles | Guochun Shi | 2003-05-30 | 2 | -23/+39 |
| * | Since there is now another derived .inc file, ignore them all. | Misha Brukman | 2003-05-29 | 1 | -1/+1 |
| * | Use an absolute path to TableGen because not everyone (e.g. automatic tester) | Misha Brukman | 2003-05-29 | 1 | -1/+1 |
| * | When TableGen finds an error in the SparcV9.td file, it exits with a non-zero | Misha Brukman | 2003-05-29 | 1 | -1/+4 |
| * | Fixed to use the correct format of the instruction. | Misha Brukman | 2003-05-29 | 1 | -3/+3 |
