| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Fix thinko | Anton Korobeynikov | 2009-07-16 | 1 | -8/+6 |
| * | Fix epic bug with invalid regclass for R0D | Anton Korobeynikov | 2009-07-16 | 1 | -1/+1 |
| * | More register pairs (now 32 bit ones) | Anton Korobeynikov | 2009-07-16 | 1 | -0/+53 |
| * | Add even-odd register pairs | Anton Korobeynikov | 2009-07-16 | 1 | -1/+62 |
| * | Change register allocation order to reduce amount of callee-saved regs to be ... | Anton Korobeynikov | 2009-07-16 | 1 | -18/+98 |
| * | Change register allocation order, so R0 will be allocated the last among scra... | Anton Korobeynikov | 2009-07-16 | 1 | -2/+2 |
| * | Add shifts and reg-imm address matching | Anton Korobeynikov | 2009-07-16 | 1 | -0/+54 |
| * | Add bunch of 32-bit patterns... Uffff :) | Anton Korobeynikov | 2009-07-16 | 1 | -0/+1 |
| * | Add 32 bit subregs | Anton Korobeynikov | 2009-07-16 | 1 | -21/+82 |
| * | Add add reg-reg and reg-imm patterns | Anton Korobeynikov | 2009-07-16 | 1 | -1/+9 |
| * | Let's start another backend :) | Anton Korobeynikov | 2009-07-16 | 1 | -0/+93 |
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