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* fix PR7465, mishandling of lcall and ljmp: intersegment long Chris Lattner2010-08-191-0/+1
* minor progress towards fixing PR7465Chris Lattner2010-08-191-2/+2
* Add AVX version of CLMUL instructionsBruno Cardoso Lopes2010-07-231-0/+6
* Add complete assembler support for FMA3 instructions, with descriptions and e...Bruno Cardoso Lopes2010-07-231-0/+6
* Add new AVX instruction vinsertf128Bruno Cardoso Lopes2010-07-201-0/+5
* Add AVX vbroadcast new instructionBruno Cardoso Lopes2010-07-201-0/+9
* AVX 256-bit conversion instructionsBruno Cardoso Lopes2010-07-131-0/+3
* Since AVX is a superset of all SSE versions, only use HasAVX for AVX instruct...Bruno Cardoso Lopes2010-07-131-12/+8
* Implement the major chunk of PR7195: support for 'callw'Chris Lattner2010-07-071-3/+11
* Add AVX vblendvpd, vblendvps and vpblendvb instructionsBruno Cardoso Lopes2010-07-061-0/+4
* - Add AVX SSE2 Move doubleword and quadword instructions.Bruno Cardoso Lopes2010-07-011-3/+6
* Reapply r106896:Bruno Cardoso Lopes2010-06-251-4/+4
* Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcasesBruno Cardoso Lopes2010-06-241-0/+12
* Add AVX compare packed instructionsBruno Cardoso Lopes2010-06-221-0/+12
* Add AVX MOV{SS,SD}{rr,rm} instructionsBruno Cardoso Lopes2010-06-221-7/+10
* Fix typo, SSE1 should be used by XS, not SSE2Bruno Cardoso Lopes2010-06-181-1/+1
* Apply some refactor to packed instructionsBruno Cardoso Lopes2010-06-181-0/+12
* Use new tablegen resources in SSE tablegen code. This willBruno Cardoso Lopes2010-06-171-0/+11
* More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rrBruno Cardoso Lopes2010-06-121-0/+10
* Reapply r105521, this time appending "LLU" to 64 bitBruno Cardoso Lopes2010-06-081-0/+13
* revert r105521, which is breaking the buildbots with stuff like this:Chris Lattner2010-06-051-13/+0
* Initial AVX support for some instructions. No patterns matchedBruno Cardoso Lopes2010-06-051-0/+13
* Remove FIXME.Eric Christopher2010-04-051-2/+1
* Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.Jakob Stoklund Olesen2010-04-051-0/+13
* Separate out the AES-NI instructions from the SSE4.2 instructions. AddEric Christopher2010-04-021-0/+15
* Renumber SSE execution domains for better code size.Jakob Stoklund Olesen2010-03-301-4/+4
* Teach TableGen to understand X.Y notation in the TSFlagsFields strings.Jakob Stoklund Olesen2010-03-251-6/+3
* Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain c...Jakob Stoklund Olesen2010-03-251-19/+45
* Fixed the SS42AI template for the SSE 4.2 instructions with TA prefix so it doesKevin Enderby2010-03-241-1/+1
* Added the rdtscp instruction to the x86 instructionSean Callanan2010-02-131-1/+1
* remove special cases for vmlaunch, vmresume, vmxoff, and swapgsChris Lattner2010-02-131-4/+8
* enhance the immediate field encoding to know whether the immediateChris Lattner2010-02-121-5/+20
* add a bunch of mod/rm encoding types for fixed mod/rm bytes.Chris Lattner2010-02-121-0/+5
* Instruction fixes, added instructions, and AsmString changes in theSean Callanan2009-12-181-14/+27
* PR 5245 - The imediate size target flag was not set on 3A-prefixed SSSE3 inst...Nate Begeman2009-10-191-2/+2
* Modified the Intel instruction tables to includeSean Callanan2009-09-151-0/+18
* Implement sse4.2 string/text processing instructions:Eric Christopher2009-08-181-1/+5
* Add crc32 instruction and intrinsics. Add a new class of prefixEric Christopher2009-08-081-0/+6
* Add ability to override segment (mostly for code emitter purposes).Anton Korobeynikov2008-10-111-0/+3
* Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use theBill Wendling2008-08-271-4/+8
* Nevermind. This broke the bootstrap (?!).Bill Wendling2008-08-251-8/+4
* MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of theseBill Wendling2008-08-251-4/+8
* Provide a 64 bit variant of mmx.maskmovq intrinsic lowering.Anton Korobeynikov2008-08-231-0/+3
* Fix comment spacing.Dan Gohman2008-08-201-1/+1
* SSE codegen for vsetcc nodesNate Begeman2008-07-171-0/+6
* Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, etc...Evan Cheng2008-03-141-3/+3
* Add lock prefix support to x86. Also add the instructions necessary for the ...Andrew Lenharth2008-03-011-0/+2
* SSE4.1 64b integer insert/extract pattern supportNate Begeman2008-02-121-0/+29
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
* Fix JIT encoding for CMPSD as well.Evan Cheng2007-12-201-0/+4