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path: root/lib/Target/X86/X86InstrInfo.h
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* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-0/+6
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-3/+6
* Update LLVM for rebase to r212749.Stephen Hines2014-07-211-4/+20
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-291-1/+8
* Update to LLVM 3.5a.Stephen Hines2014-04-241-121/+129
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-0/+2
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-2/+0
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-0/+2
* Fix the ExecutionDepsFix pass to handle AVX instructions.Andrew Trick2013-10-141-0/+2
* Add MI-Sched support for x86 macro fusion.Andrew Trick2013-06-231-0/+3
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-161-6/+0
* X86: Stop LEA64_32r doing unspeakable things to its arguments.Tim Northover2013-06-101-0/+13
* Re-work X86 code generation of atomic ops with spin-loopMichael Liao2012-09-201-0/+3
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-021-1/+5
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-021-0/+8
* Revert r160920 and r160919 due to dragonegg and clang selfhost failureManman Ren2012-07-291-8/+0
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-07-281-0/+8
* X86: peephole optimization to remove cmp instructionManman Ren2012-07-061-0/+15
* Add early if-conversion support to X86.Jakob Stoklund Olesen2012-07-041-0/+8
* Make helper method static since it doesn't use anything in the class.Craig Topper2012-06-231-3/+3
* Revert r157755.Manman Ren2012-06-061-3/+0
* Revert r157831Manman Ren2012-06-031-6/+0
* X86: peephole optimization to remove cmp instructionManman Ren2012-06-011-0/+6
* Remove a trailing space and fix a comment.Craig Topper2012-06-011-3/+2
* X86: replace SUB with CMP if possibleManman Ren2012-05-311-0/+3
* Added FMA3 Intel instructions.Elena Demikhovsky2012-05-311-1/+3
* Reorder includes in Target backends to following coding standards. Remove som...Craig Topper2012-03-171-1/+1
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Break false dependencies before partial register updates.Jakob Stoklund Olesen2011-11-151-0/+5
* Expand the x86 V_SET0* pseudos right after register allocation.Jakob Stoklund Olesen2011-09-291-0/+3
* Promote the X86 Get/SetSSEDomain functions to TargetInstrInfo.Jakob Stoklund Olesen2011-09-271-5/+3
* * Combines Alignment, AuxInfo, and TB_NOT_REVERSABLE flag into aBruno Cardoso Lopes2011-09-081-5/+13
* Hoist hasLoadFromStackSlot and hasStoreToStackSlot.Jakob Stoklund Olesen2011-08-081-21/+0
* Refactor X86 target to separate MC code from Target code.Evan Cheng2011-07-251-501/+2
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-011-1/+4
* Remove unused OpcodeMask enumerator.Francois Pichet2011-05-251-1/+0
* Fix MSVC warning: "is out of range for enum constant" Francois Pichet2011-05-251-1/+1
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
* Make OpcodeMask an unsigned long long literal to deal with overflow.Joerg Sonnenberger2011-04-041-1/+1
* Add support for the VIA PadLock instructions.Joerg Sonnenberger2011-04-041-2/+3
* Expand Op0Mask by one bit in preparation for the PadLock prefixes.Joerg Sonnenberger2011-04-041-11/+12
* Increased the register pressure limit on x86_64 from 8 to 12Andrew Trick2011-03-051-0/+2
* whitespaceAndrew Trick2011-03-051-51/+51
* Implement xgetbv and xsetbv.Rafael Espindola2011-02-221-0/+4
* Move callee-saved regs spills / reloads to TFIAnton Korobeynikov2010-11-271-11/+0
* tidy up, no functionality change.Chris Lattner2010-11-141-1/+1
* Re-enable register pressure aware machine licm with fixes. Hoist() may haveEvan Cheng2010-10-191-0/+5
* Revert r116781 "- Add a hook for target to determine whether an instruction defDaniel Dunbar2010-10-191-5/+0
* - Add a hook for target to determine whether an instruction def isEvan Cheng2010-10-191-0/+5
* Reduce casting in various tables by defining the tableChris Lattner2010-10-071-5/+5
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