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* AVX-512: Fixed encoding of VMOVQ instruction.Elena Demikhovsky2013-10-031-3/+3
* Replace C++ style comment with a C style comment to satisfy some of the build...Craig Topper2013-10-031-1/+1
* Remove comma from the end of an enum.Craig Topper2013-10-031-1/+1
* Add XOP disassembler support. Fixes PR13933.Craig Topper2013-10-035-125/+238
* Add patterns for selecting TBM instructions from logical operations. Patch fr...Craig Topper2013-10-032-32/+98
* AVX-512: fixed a bug in getLoadStoreRegOpcode() for AVX-512 targetElena Demikhovsky2013-10-022-8/+5
* AVX-512: Added TB prefix to all instructions without prefixes,Elena Demikhovsky2013-10-022-20/+18
* Remove several unused variables.Rafael Espindola2013-10-012-4/+0
* AVX-512: Added X86vzmovl patternsElena Demikhovsky2013-10-011-0/+5
* Remove 0 as a valid encoding for the m-mmmm field.Craig Topper2013-10-011-2/+0
* Remove unneeded fields from disassembler internal instruction format.Craig Topper2013-10-012-20/+0
* BEXTR should be defined to take same type for bother operands.Craig Topper2013-10-011-1/+1
* Forgot to add a break statement.Preston Gurd2013-09-301-0/+1
* The X86FixupLEAs pass for Intel Atom must not call convertToThreeAddressPreston Gurd2013-09-301-0/+8
* Various x86 disassembler fixes.Craig Topper2013-09-303-47/+12
* Change type of XOP flag in code emitters to a bool. Remove a some unneeded ca...Craig Topper2013-09-292-14/+8
* Add comments for XOPA map introduced with TBM instructions.aCraig Topper2013-09-292-2/+4
* Fix spelling intruction -> instruction.Robert Wilhelm2013-09-281-2/+2
* Adding intrinsics to the llvm backend for TBM instruction set.Yunzhong Gao2013-09-275-0/+89
* Put HasAVX512 predicate on some patterns to properly disable them when AVX512...Craig Topper2013-09-271-9/+11
* Switch HasAVX to UseAVX in one spot to ensure that AVX512 form of VINSERTPS i...Craig Topper2013-09-271-1/+1
* Removal some duplicate patterns.Craig Topper2013-09-271-8/+0
* Fixing Intel format of the vshufpd instruction.Yunzhong Gao2013-09-271-2/+2
* Mark the x86 machine model as incomplete. PR17367.Andrew Trick2013-09-252-0/+8
* MC: Remove vestigial PCSymbol field from AsmInfoDavid Majnemer2013-09-251-2/+0
* Adding a feature flag to the llvm backend for x86 TBM instruction set.Yunzhong Gao2013-09-243-1/+13
* Followup to r191252.Bill Wendling2013-09-241-113/+127
* Selecting the address from a very long chain of GEPs can blow the stack.Bill Wendling2013-09-241-3/+12
* ISelDAG: spot chain cycles involving MachineNodesTim Northover2013-09-221-0/+1
* X86: Use R_X86_64_TPOFF64 for FK_Data_8David Majnemer2013-09-221-0/+3
* Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs spl...Juergen Ributzka2013-09-211-10/+1
* Remove alignment restrictions from FMA load folding.Craig Topper2013-09-211-31/+31
* Fix the buildbotJuergen Ributzka2013-09-211-3/+3
* [X86] Emulate AVX 256bit MIN/MAX support by splitting the vector.Juergen Ributzka2013-09-211-19/+45
* SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.Juergen Ributzka2013-09-211-1/+10
* Lift alignment restrictions on load/store folding of VEXTRACTI128/VINSERTI128.Craig Topper2013-09-201-12/+12
* X86 horizontal vector reduction cost modelYi Jiang2013-09-191-0/+84
* X86: FrameIndex addressing modes do have a base register.Tim Northover2013-09-191-1/+2
* Prevent extra calls to ToggleFeature for Feature64Bit and FeatureCMOV if they...Craig Topper2013-09-181-2/+2
* Fix X86 subtarget to not overwrite the autodetected features by calling InitM...Craig Topper2013-09-181-1/+1
* Lift alignment restrictions for load/store folding on VINSERTF128/VEXTRACTF12...Craig Topper2013-09-181-10/+10
* COFF: Ensure that objects produced by LLVM link with /safesehReid Kleckner2013-09-171-0/+20
* Remove unused code, which had been commented out.Preston Gurd2013-09-171-5/+0
* Add llvm.x86.* intrinsics for Intel SHA ExtensionsBen Langmuir2013-09-171-14/+26
* AVX-512: Converted to Unix styleElena Demikhovsky2013-09-171-3070/+3070
* Add AES and SHA instructions to the load folding tables.Craig Topper2013-09-171-0/+25
* Fix column alignment. No functional change.Craig Topper2013-09-171-4/+4
* Make F16C feature flag imply AVX rather than just checking both at the patterns.Craig Topper2013-09-162-2/+3
* Add the remaining Intel SHA instructionsBen Langmuir2013-09-141-0/+27
* Adds support for Atom Silvermont (SLM) - -march=slmPreston Gurd2013-09-1313-196/+1000
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