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* Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.Evan Cheng2008-03-171-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48447 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a couple missing SSE4 instructionsNate Begeman2008-03-161-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48430 91177308-0d34-0410-b5e6-96231b3b80d8
* Make insert_subreg a two-address instruction, vastly simplifying ↵Christopher Lamb2008-03-163-44/+43
| | | | | | LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace all target specific implicit def instructions with a target ↵Evan Cheng2008-03-157-70/+4
| | | | | | independent one: TargetInstrInfo::IMPLICIT_DEF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some 80 col violations.Evan Cheng2008-03-141-22/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48361 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, ↵Evan Cheng2008-03-143-32/+32
| | | | | | etc. have 8-bits immediate field (ImmT == Imm8). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48360 91177308-0d34-0410-b5e6-96231b3b80d8
* Add debugging stuff.Evan Cheng2008-03-141-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48359 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an issue that is preventing instcombine from doing a simplification.Chris Lattner2008-03-141-5/+43
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48356 91177308-0d34-0410-b5e6-96231b3b80d8
* Get rid of a pseudo instruction and replace it with subreg based operation ↵Christopher Lamb2008-03-137-56/+30
| | | | | | | | | | on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48329 91177308-0d34-0410-b5e6-96231b3b80d8
* Reimplement the parameter attributes support, phase #1. hilights:Chris Lattner2008-03-121-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | 1. There is now a "PAListPtr" class, which is a smart pointer around the underlying uniqued parameter attribute list object, and manages its refcount. It is now impossible to mess up the refcount. 2. PAListPtr is now the main interface to the underlying object, and the underlying object is now completely opaque. 3. Implementation details like SmallVector and FoldingSet are now no longer part of the interface. 4. You can create a PAListPtr with an arbitrary sequence of ParamAttrsWithIndex's, no need to make a SmallVector of a specific size (you can just use an array or scalar or vector if you wish). 5. All the client code that had to check for a null pointer before dereferencing the pointer is simplified to just access the PAListPtr directly. 6. The interfaces for adding attrs to a list and removing them is a bit simpler. Phase #2 will rename some stuff (e.g. PAListPtr) and do other less invasive changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48289 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up my own mess.Evan Cheng2008-03-122-0/+14
| | | | | | | X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48279 91177308-0d34-0410-b5e6-96231b3b80d8
* Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137Anton Korobeynikov2008-03-111-2/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48257 91177308-0d34-0410-b5e6-96231b3b80d8
* Use PassManagerBase instead of FunctionPassManager for functionsDan Gohman2008-03-113-11/+10
| | | | | | | | | that merely add passes. This allows them to be used with either FunctionPassManager or PassManager, or even with a custom new kind of pass manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement basic support for the 'f' register class constraint. This basicallyChris Lattner2008-03-111-2/+45
| | | | | | | works, but probably won't if you mix it with 't' or 'u' yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48243 91177308-0d34-0410-b5e6-96231b3b80d8
* coalesce away 80-bit floating point copies.Chris Lattner2008-03-111-4/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48241 91177308-0d34-0410-b5e6-96231b3b80d8
* convert a massive if statement to a switch.Chris Lattner2008-03-111-19/+32
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48240 91177308-0d34-0410-b5e6-96231b3b80d8
* start handling the 'f' x87 constraint.Chris Lattner2008-03-111-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48239 91177308-0d34-0410-b5e6-96231b3b80d8
* Missed part of recommit.Christopher Lamb2008-03-111-4/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48224 91177308-0d34-0410-b5e6-96231b3b80d8
* Recommitting parts of r48130. These do not appear to cause the observed ↵Christopher Lamb2008-03-115-4/+34
| | | | | | failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
* In 32-bit mode, mark 64-bit GPR's as unallocatable.Evan Cheng2008-03-111-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48217 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the build on gcc 4.2.Nick Lewycky2008-03-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48212 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the model for FP Stack return to use fp operands on the Chris Lattner2008-03-114-34/+162
| | | | | | | | RET instruction instead of using FpSET_ST0_32. This also generalizes the code to handling returning of multiple FP results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48209 91177308-0d34-0410-b5e6-96231b3b80d8
* abort with an assert instead of a cerr to get line#Chris Lattner2008-03-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48199 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't emit FP_REG_KILL into a block that just returns. NothingChris Lattner2008-03-101-6/+19
| | | | | | | can be live out of the block anyway, so it isn't needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48192 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate the FP_GET_ST0/FP_SET_ST0 target-specific dag nodes, just lower to Chris Lattner2008-03-104-84/+42
| | | | | | | | copyfromreg/copytoreg instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48174 91177308-0d34-0410-b5e6-96231b3b80d8
* Default ISD::PREFETCH to expand.Evan Cheng2008-03-101-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.Evan Cheng2008-03-107-47/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
* Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC'sScott Michel2008-03-102-1/+10
| | | | | | | | | return ValueType can depend its operands' ValueType. This is a cosmetic change, no functionality impacted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow insert_subreg into implicit, target-specific values. Christopher Lamb2008-03-107-14/+47
| | | | | | | | Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
* Increase ISD::ParamFlags to 64 bits. Increase the ByValSizeDale Johannesen2008-03-101-5/+9
| | | | | | | | | | | | field to 32 bits, thus enabling correct handling of ByVal structs bigger than 0x1ffff. Abstract interface a bit. Fixes gcc.c-torture/execute/pr23135.c and gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing on ppc32, quietly producing wrong code on x86-32.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
* teach X86InstrInfo::copyRegToReg how to copy into ST(0) from Chris Lattner2008-03-091-1/+18
| | | | | | | | | | | | | an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
* add some code to support cross-register class copying from Chris Lattner2008-03-091-4/+22
| | | | | | | RST -> RFP{32/64/80}. We only handle ST(0) for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48104 91177308-0d34-0410-b5e6-96231b3b80d8
* rearrange some code, no functionality change.Chris Lattner2008-03-091-58/+59
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48101 91177308-0d34-0410-b5e6-96231b3b80d8
* claim ST(x) registers are 80 bits, which is true. This doesn't affect Chris Lattner2008-03-091-1/+1
| | | | | | | codegen yet because these can't be spilled (they don't exist until after RA). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48098 91177308-0d34-0410-b5e6-96231b3b80d8
* rename FP_SETRESULT -> FP_SET_ST0Chris Lattner2008-03-094-15/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48094 91177308-0d34-0410-b5e6-96231b3b80d8
* rename FpGETRESULT32 -> FpGET_ST0_32 etc. Add support forChris Lattner2008-03-095-46/+62
| | | | | | | | isel'ing value preserving FP roundings from one fp stack reg to another into a noop, instead of stack traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48093 91177308-0d34-0410-b5e6-96231b3b80d8
* Finish implementing a readme entry: when inserting an i64 variableChris Lattner2008-03-092-43/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | into a vector of zeros or undef, and when the top part is obviously zero, we can just use movd + shuffle. This allows us to compile vec_set-B.ll into: _test3: movl $1234567, %eax andl 4(%esp), %eax movd %eax, %xmm0 ret instead of: _test3: subl $28, %esp movl $1234567, %eax andl 32(%esp), %eax movl %eax, (%esp) movl $0, 4(%esp) movq (%esp), %xmm0 addl $28, %esp ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48090 91177308-0d34-0410-b5e6-96231b3b80d8
* add a noteChris Lattner2008-03-091-0/+37
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48064 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement a readme entry, compilingChris Lattner2008-03-092-26/+51
| | | | | | | | | | | | | | | | #include <xmmintrin.h> __m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} into: movl $1, %eax movd %eax, %xmm0 ret instead of a constant pool load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48063 91177308-0d34-0410-b5e6-96231b3b80d8
* 1) Improve comments.Chris Lattner2008-03-081-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | 2) Don't try to insert an i64 value into the low part of a vector with movq on an x86-32 target. This allows us to compile: __m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} into: _doload64: movaps LCPI1_0, %xmm0 ret instead of: _doload64: subl $28, %esp movl $0, 4(%esp) movl $1, (%esp) movq (%esp), %xmm0 addl $28, %esp ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48057 91177308-0d34-0410-b5e6-96231b3b80d8
* minor simplifications to this code, don't create a deadChris Lattner2008-03-081-6/+10
| | | | | | | | SCALAR_TO_VECTOR on paths that end up not using it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48056 91177308-0d34-0410-b5e6-96231b3b80d8
* This one looks easy, add a note.Chris Lattner2008-03-081-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48055 91177308-0d34-0410-b5e6-96231b3b80d8
* move these to the appropriate fileChris Lattner2008-03-082-53/+57
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48054 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ↵Evan Cheng2008-03-082-6/+12
| | | | | | and prefetchnta instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
* mark frem as expand for all legal fp types on x86, regardless of whetherChris Lattner2008-03-071-3/+2
| | | | | | | we're using SSE or not. This fixes PR2122. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48006 91177308-0d34-0410-b5e6-96231b3b80d8
* some more spelling changesGabor Greif2008-03-061-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47996 91177308-0d34-0410-b5e6-96231b3b80d8
* evan implemented this.Chris Lattner2008-03-051-26/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47948 91177308-0d34-0410-b5e6-96231b3b80d8
* isTwoAddress = 1 -> Constraints.Evan Cheng2008-03-051-47/+47
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47941 91177308-0d34-0410-b5e6-96231b3b80d8
* PSLLWri etc. are two-address instructions.Evan Cheng2008-03-051-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47940 91177308-0d34-0410-b5e6-96231b3b80d8
* add a noteChris Lattner2008-03-051-0/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47939 91177308-0d34-0410-b5e6-96231b3b80d8
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