| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_... | David Blaikie | 2011-12-20 | 1 | -0/+2 |
| * | Move TargetRegistry and TargetSelect from Target to Support where they belong. | Evan Cheng | 2011-08-24 | 1 | -1/+1 |
| * | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng | 2011-07-14 | 1 | -15/+0 |
| * | - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo | Evan Cheng | 2011-07-11 | 1 | -1/+1 |
| * | Change createAsmParser to take a MCSubtargetInfo instead of triple, | Evan Cheng | 2011-07-09 | 1 | -0/+14 |
| * | Eliminate asm parser's dependency on TargetMachine: | Evan Cheng | 2011-07-08 | 1 | -1/+2 |
| * | Compute feature bits at time of MCSubtargetInfo initialization. | Evan Cheng | 2011-07-07 | 1 | -1/+1 |
| * | Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. | Evan Cheng | 2011-07-01 | 1 | -1/+1 |
| * | Rename TargetSubtarget to TargetSubtargetInfo for consistency. | Evan Cheng | 2011-07-01 | 1 | -1/+1 |
| * | - Added MCSubtargetInfo to capture subtarget features and scheduling | Evan Cheng | 2011-07-01 | 1 | -0/+7 |
| * | Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to | Evan Cheng | 2011-06-30 | 1 | -1/+2 |
| * | Remove xs1b predicate since it is no longer needed to differentiate betweem | Richard Osborne | 2009-10-06 | 1 | -6/+0 |
| * | Remove xs1a subtarget. xs1a is a preproduction device used in | Richard Osborne | 2009-10-06 | 1 | -2/+1 |
| * | Default to the xs1b subtarget | Richard Osborne | 2009-10-06 | 1 | -1/+1 |
| * | Normalize Subtarget constructors to take a target triple string instead of | Daniel Dunbar | 2009-08-02 | 1 | -2/+1 |
| * | Add XCore backend. | Richard Osborne | 2008-11-07 | 1 | -0/+28 |
