aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target
Commit message (Expand)AuthorAgeFilesLines
* Remove a redundant newline in the asm output for ELF .rodata sections.Dan Gohman2007-06-271-1/+1
* Silence a warning.Evan Cheng2007-06-261-1/+2
* Revert the earlier change that removed the M_REMATERIALIZABLE machineDan Gohman2007-06-2611-38/+28
* Generalize MVT::ValueType and associated functions to be able to representDan Gohman2007-06-251-4/+8
* Make minor adjustments to whitespace and comments to reduce differencesDan Gohman2007-06-251-25/+28
* Fix loadv2i32 to be loadv4i32, though it isn't actually used anywhere yet.Dan Gohman2007-06-251-1/+1
* Say AT&T instead of Intel in the comments for AT&T support.Dan Gohman2007-06-252-3/+3
* Fix the build.Owen Anderson2007-06-221-1/+1
* Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits fromDan Gohman2007-06-2210-18/+27
* Quote complex names for Darwin X86 and ARM.Dale Johannesen2007-06-222-2/+14
* Be more conservative of duplicating blocks.Evan Cheng2007-06-191-1/+1
* Allow predicated immediate ARM to ARM calls.Evan Cheng2007-06-193-1/+14
* Pass a SelectionDAG into SDNode::dump everywhere it's used, in preprationDan Gohman2007-06-192-2/+2
* describe an argument, hide it.Chris Lattner2007-06-191-1/+3
* Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoadDan Gohman2007-06-1911-25/+38
* Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.Evan Cheng2007-06-195-31/+8
* If a function is vararg, never pass inreg arguments in registers. Thanks toChris Lattner2007-06-195-15/+24
* Look for VECTOR_SHUFFLE that's identity operation on either LHS or RHS. This ...Evan Cheng2007-06-191-2/+19
* Define the pushq instruction for x86-64.Dan Gohman2007-06-181-0/+2
* Revert patch. It regresses:Bill Wendling2007-06-161-2/+0
* Fix a failure to bit_convert from integer GPR to MMX register.Bill Wendling2007-06-161-0/+2
* Instructions with unique labels or embedded jumptables cannot be duplicated d...Evan Cheng2007-06-152-0/+31
* Rename MVT::getVectorBaseType to MVT::getVectorElementType.Dan Gohman2007-06-142-24/+24
* Do not treat FP_REG_KILL as terminator in branch analysis (X86).Dale Johannesen2007-06-142-4/+11
* Add a target hook to allow loads from constant pools to be rematerialized, an...Dan Gohman2007-06-142-0/+26
* Eliminate some redundant newlines in asm output.Dan Gohman2007-06-143-5/+4
* Add support to tablegen for specifying subregister classes on a per register ...Christopher Lamb2007-06-131-0/+4
* Handle blocks with 2 unconditional branches in AnalyzeBranch.Dale Johannesen2007-06-134-0/+40
* fix x86-64 mmx calling convention for real, which passes in integer gprs.Chris Lattner2007-06-091-3/+9
* fix mmx handling bugChris Lattner2007-06-091-1/+4
* Add a utility routine to check for unpredicated terminator instruction.Evan Cheng2007-06-085-11/+18
* Define AsmTransCBE for ARM.Lauro Ramos Venancio2007-06-081-0/+25
* Fix ARM condition code subsumission check.Evan Cheng2007-06-081-3/+3
* tBcc is not a barrier.Evan Cheng2007-06-081-1/+1
* Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a compila...Evan Cheng2007-06-071-1/+1
* Mark these instructions clobbersPred. They modify the condition code register.Evan Cheng2007-06-063-9/+19
* Added clobbersPred.Evan Cheng2007-06-061-0/+1
* Initial Mips support, here we go! =)Bruno Cardoso Lopes2007-06-0621-0/+2788
* Print predicate of the second instruction of the two-piece constant MI.Evan Cheng2007-06-051-1/+3
* PIC label asm printing cosmetic changes.Evan Cheng2007-06-051-0/+9
* Misuse of hasExternalLinkage(), should be checking isDeclaration().Evan Cheng2007-06-041-2/+2
* update this entry, now that Anton implemented shift/and lowering forChris Lattner2007-06-021-17/+66
* Opcode modifier s comes after condition code. e.g. addlts, not addslt.Evan Cheng2007-06-011-20/+20
* Set ARM ifcvt duplication limit to 3 for now.Evan Cheng2007-06-011-0/+1
* Make jumptable non-predicable for now.Evan Cheng2007-06-011-11/+10
* Fix the asmprinter so that a globalvalue can specify an explicit alignmentChris Lattner2007-05-311-1/+1
* For VFP2 fldm, fstm instructions, the condition code is printed after the add...Evan Cheng2007-05-291-4/+4
* For ldrb, strh, etc., the condition code is before the width specifier. e.g. ...Evan Cheng2007-05-291-23/+23
* Add missing const qualifiers.Evan Cheng2007-05-294-19/+24
* Add missing const qualifiers.Evan Cheng2007-05-291-1/+1