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* Move to thumb2 loads, fixes a problem with incoming registersEric Christopher2010-10-081-16/+13
* reimplement the second half of the or/add optimization. We should nowChris Lattner2010-10-083-18/+51
* Enable binary encoding of some simple instructions.Jim Grosbach2010-10-081-0/+8
* Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.Jim Grosbach2010-10-084-8/+8
* Use the new TB_NOT_REVERSABLE flag instead of special Chris Lattner2010-10-081-20/+26
* simplify some map operations.Chris Lattner2010-10-072-16/+14
* Reimplement (part of) the or -> add optimization. Matching 'or' into 'add'Chris Lattner2010-10-074-65/+126
* Code refactoring.Evan Cheng2010-10-072-104/+160
* Reduce casting in various tables by defining the tableChris Lattner2010-10-072-27/+26
* simplify code: don't build up vector only to assert it is empty.Chris Lattner2010-10-071-8/+4
* Now with fewer extraneous semicolons!Owen Anderson2010-10-071-1/+1
* Trivial MC code emitter shell. No instruction forms actually handled yet.Jim Grosbach2010-10-071-3/+19
* Include the auto-generated bits for machine encoding.Jim Grosbach2010-10-071-0/+20
* Remember to promote load/store types for stack to register size.Eric Christopher2010-10-071-0/+6
* convert test to use the existing classes that the multipatternsChris Lattner2010-10-071-99/+48
* convert cmp to use a multipatternChris Lattner2010-10-071-199/+181
* Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Als...Evan Cheng2010-10-072-16/+22
* ARM instruction don't have instruction prefixes, so remove the helper functionsJim Grosbach2010-10-071-16/+1
* reduce redundancy between pattern copies.Chris Lattner2010-10-071-49/+53
* the opcode for BinOpMI/BinOpMI8 is always the same, remove the argument.Chris Lattner2010-10-071-19/+19
* Improve comment.Owen Anderson2010-10-071-1/+1
* convert adc/sbb to a multipattern. Because the adde/sube nodes Chris Lattner2010-10-071-310/+150
* Add initialization routines for Target.Owen Anderson2010-10-071-2/+12
* Fix obvious mistake pointed out by Michael Spencer.Jakob Stoklund Olesen2010-10-071-1/+1
* Add the missing cases to the type->registerclass conversion function.Kalle Raiskila2010-10-071-0/+14
* Implement two virtual functions in SPUTargetLowering.Kalle Raiskila2010-10-072-0/+31
* Use the correct register class for load instructions - fixesEric Christopher2010-10-071-1/+8
* Use the correct register class here.Eric Christopher2010-10-071-1/+3
* Use the thumb2 conditional move instruction.Eric Christopher2010-10-071-1/+1
* Remove in-progress assertion, add TODO.Eric Christopher2010-10-071-1/+1
* Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vld...Evan Cheng2010-10-077-42/+143
* add support for isConvertibleToThreeAddress to ArithBinOpEFLAGS,Chris Lattner2010-10-071-178/+18
* Fix a few issues in ArithBinOpEFLAGS that made it specific to and.Chris Lattner2010-10-071-497/+18
* Convert 'and' to single instance of a multipatternChris Lattner2010-10-071-50/+63
* Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode.Jim Grosbach2010-10-072-7/+20
* add a new BinOpAI class to represent the immediate form that directly acts on...Chris Lattner2010-10-071-10/+16
* Allow use of the 16-bit literal move instruction in CMOVs for ARM mode.Jim Grosbach2010-10-072-8/+23
* add a bunch of classes for other common patterns.Chris Lattner2010-10-071-60/+51
* Define a new BinOpRI8 class and use it to define the imm8 versions of and.Chris Lattner2010-10-071-27/+43
* Constrain the offset register to a *_NOSP register class when inserting LEAJakob Stoklund Olesen2010-10-071-2/+35
* add the pattern operator to match to X86TypeInfo, use this to Chris Lattner2010-10-071-11/+11
* Properly handle GR32_NOSP in X86RegisterInfo::getMatchingSuperRegClass.Jakob Stoklund Olesen2010-10-061-1/+6
* remove trailing whitespaceJim Grosbach2010-10-061-5/+5
* First in a sequence of ARM/MC/*ELF* specific work.Jason W Kim2010-10-062-39/+60
* Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions.Jim Grosbach2010-10-063-7/+9
* Kill of the vestiges of the 'call' Modifier (no longer needed for PLT).Jim Grosbach2010-10-064-21/+12
* Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-neededJim Grosbach2010-10-062-40/+3
* Change the NEON VDUPfdf and VDUPfqf pseudo-instructions to actually beJim Grosbach2010-10-062-7/+28
* Add a 'pattern' arg to the ARM PseudoNeonI class.Jim Grosbach2010-10-062-7/+9
* target operand flag values aren't a bitmaskJim Grosbach2010-10-061-2/+2
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